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US5571751A Expired / Lapsed US ⏱️ 0.0 years remaining

Interconnect structures for integrated circuits

Assignee: National Semiconductor Corp
•
Filing: 1994-08-25
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Granted: 1996-11-05
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Expires: 2014-08-25
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Abstract

Abstract A multilevel interconnect structure which has a first horizontal metallic conductor disposed on the top of a previously formed first contact/via dielectric where the contact/via dielectric contains a contact/via hole. A horizontal interconnect is deposited over the first contact/via dielectric and has a first surface defined by the thickness and linewidth of the horizontal interconnect. A vertical metallic conductor is deposited in the contact/via hole to form a contact/via plug which extends through the dielectric and contacts the first surface of the horizontal interconnect. The process may be used to form additional levels and to form a plurality of similar horizontal and vertical metallic interconnects.

Inventors

  • 👤 Henry W. Chung

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 23:13
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/056; H10W20/063; H10W20/0633; H10W20/071; H10W20/081; H10W20/083; H10W20/40; H10W20/41; H10W20/42; H10W20/425; Y; Y10; Y10S; Y10S257/00; Y10S257/915

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 135 words
A process for forming a metallic interconnect structure in an integrated circuit, comprising the steps of: forming a dielectric layer; forming a sacrificial layer on the dielectric layer; forming a mask having an opening to the sacrificial layer; etching the sacrificial layer through the mask to form an opening in the sacrificial layer; etching the dielectric layer through the opening in the sacrificial layer to form an opening in the dielectric layer; depositing a first metallic layer to fill the opening in the sacrificial layer and the opening in the dielectric layer; removing the sacrificial layer following the first metallic depositing step; depositing a second metallic layer on the dielectric layer, wherein a contact is formed between the first and the second metallic layers; and patterning the second metallic layer to form a horizontal interconnect.
Claim 2
Dependent Claim 135 words
A process for forming a metallic interconnect structure in an integrated circuit, comprising the steps of: forming a dielectric layer; forming a sacrificial layer on the dielectric layer; forming a mask having an opening to the sacrificial layer; etching the sacrificial layer through the mask to form an opening in the sacrificial layer; etching the dielectric layer through the opening in the sacrificial layer to form an opening in the dielectric layer; depositing a first metallic layer to fill the opening in the sacrificial layer and the opening in the dielectric layer; removing the sacrificial layer following the first metallic depositing step; depositing a second metallic layer on the dielectric layer, wherein a contact is formed between the first and the second metallic layers; and patterning the second metallic layer to form a horizontal interconnect.
Claim 3
Dependent Claim 25 words
A process as in claim 1, wherein the second depositing step forms a substantially vertical contact between the first metallic layer and the horizontal interconnect.
Claim 4
Dependent Claim 15 words
A process as in claim 1, wherein the second metallic layer terminates the horizontal interconnect.
Claim 5
Dependent Claim 19 words
A process as in claim 1, wherein the second etching step anisotropically forms an opening in the dielectric layer.
Claim 6
Dependent Claim 128 words
A process for forming a metallic interconnect structure in an integrated circuit, comprising the steps of: forming a dielectric layer; forming a mask having an opening to the first dielectric layer; etching the dielectric layer through the mask to form an opening in the dielectric layer to a first depth; depositing a first metallic layer to fill the opening in the dielectric layer; removing a portion of the dielectric layer to a second depth less than the first depth to expose a portion of the first metallic layer; following the removing step, depositing a second metallic layer over the dielectric layer wherein a contact is formed between the first metallic layer portion and the second metallic layer; and patterning the second metallic layer to form a horizontal interconnect.
Claim 7
Dependent Claim 128 words
A process for forming a metallic interconnect structure in an integrated circuit, comprising the steps of: forming a dielectric layer; forming a mask having an opening to the first dielectric layer; etching the dielectric layer through the mask to form an opening in the dielectric layer to a first depth; depositing a first metallic layer to fill the opening in the dielectric layer; removing a portion of the dielectric layer to a second depth less than the first depth to expose a portion of the first metallic layer; following the removing step, depositing a second metallic layer over the dielectric layer wherein a contact is formed between the first metallic layer portion and the second metallic layer; and patterning the second metallic layer to form a horizontal interconnect.
Claim 8
Dependent Claim 17 words
A process as in claim 5, wherein the second depositing step forms a substantially vertical contact interface.
Claim 9
Dependent Claim 18 words
A process as in claim 5, wherein the etching step anisotropically forms an opening in the dielectric layer.
Claim 10
Dependent Claim 232 words
A process comprising the steps of: forming a first dielectric layer; depositing a first metallic layer on the first dielectric layer; forming a first mask having an opening to the first metallic layer; etching the first metallic layer through the mask to form a first opening in the first metallic layer; etching the first dielectric layer through the opening in the first metallic layer to form an opening in the first dielectric layer; depositing a second metallic layer to fill the first opening in the first metallic layer and the opening in the first dielectric layer; removing the first mask; forming a second dielectric layer disposed over the first dielectric layer and the first metallic layer; depositing a third metallic layer on the second dielectric layer; forming a mask having an opening to the third metallic layer; etching the third metallic layer through the mask to form an opening in the third metallic layer; etching the second dielectric layer through the opening in the third metallic layer to form an opening in the second dielectric layer; etching the first metallic layer through the openings in the third metallic layer and the second dielectric layer to form a second opening in the first metallic layer; and depositing a fourth metallic layer to fill the opening in the third metallic layer and the second dielectric and the first opening in the first metallic layer.
Claim 11
Dependent Claim 232 words
A process comprising the steps of: forming a first dielectric layer; depositing a first metallic layer on the first dielectric layer; forming a first mask having an opening to the first metallic layer; etching the first metallic layer through the mask to form a first opening in the first metallic layer; etching the first dielectric layer through the opening in the first metallic layer to form an opening in the first dielectric layer; depositing a second metallic layer to fill the first opening in the first metallic layer and the opening in the first dielectric layer; removing the first mask; forming a second dielectric layer disposed over the first dielectric layer and the first metallic layer; depositing a third metallic layer on the second dielectric layer; forming a mask having an opening to the third metallic layer; etching the third metallic layer through the mask to form an opening in the third metallic layer; etching the second dielectric layer through the opening in the third metallic layer to form an opening in the second dielectric layer; etching the first metallic layer through the openings in the third metallic layer and the second dielectric layer to form a second opening in the first metallic layer; and depositing a fourth metallic layer to fill the opening in the third metallic layer and the second dielectric and the first opening in the first metallic layer.
Claim 12
Dependent Claim 55 words
A process as in claim 8, wherein the first dielectric layer is a contact dielectric, and the second dielectric layer is a via dielectric, and wherein the first and third metallic layers comprise a Titanium/Titanium Nitride/Aluminum-Copper alloy/Titanium Nitride stack, and wherein the second and fourth metallic layers comprise a Titanium/Titanium Nitride layer stack and Tungsten.
Claim 13
Dependent Claim 13 words
The process as in claim 1 wherein the sacrificial layer is silicon nitride.

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-11-05 2000-05-06 2000-11-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-11-05 2004-05-06 2004-11-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-11-05 2008-05-06 2008-11-05 $7700.00 Window Closed / Lapsed

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