Wafer burn-in and test system

Claim 1

A method of forming an interconnection system to semiconductor devices formed on a wafer for burn-in and testing of the semiconductor devices prior to separation from the semiconductor wafer, comprising the steps of: forming an insulating layer over the semiconductor wafer and the semiconductor devices formed thereon, the semiconductor devices arranged in rows, each semiconductor device having a plurality of bond pads and first and second edges extending in a row direction, and the insulating layer having openings over each of the bond pads; forming a plurality of conductors, each of said conductors overlaying the semiconductor devices in a row without extending over the first and second edges of the semiconductor devices in the row, each of said conductors connected to a bond pad of each semiconductor device in the row; forming test point contacts on the semiconductor wafer at locations not containing semiconductor devices; and connecting each of the test point contacts to one of the plurality of conductors.

Claim 2

A method of forming an interconnection system to semiconductor devices formed on a wafer for burn-in and testing of the semiconductor devices prior to separation from the semiconductor wafer, comprising the steps of: forming an insulating layer over the semiconductor wafer and the semiconductor devices formed thereon, the semiconductor devices arranged in rows, each semiconductor device having a plurality of bond pads and first and second edges extending in a row direction, and the insulating layer having openings over each of the bond pads; forming a plurality of conductors, each of said conductors overlaying the semiconductor devices in a row without extending over the first and second edges of the semiconductor devices in the row, each of said conductors connected to a bond pad of each semiconductor device in the row; forming test point contacts on the semiconductor wafer at locations not containing semiconductor devices; and connecting each of the test point contacts to one of the plurality of conductors.

Claim 5

A method of forming an interconnection system to semiconductor devices formed on a wafer for burn-in and testing of the semiconductor devices prior to separation from a semiconductor wafer, comprising the steps of: forming a first insulating layer over the semiconductor wafer and the semiconductor devices formed thereon, each semiconductor device having a plurality of bond pads and edges defining a top surface, the first insulating layer having openings over each of the bond pads; forming a layer of first conductors over said first insulating layer, each of said first conductors overlaying an associated semiconductor device without extending past the edges defining a top surface of said associated semiconductor device, each of said first conductors connected to a bond pad on said associated semiconductor device; forming a second insulating layer over the layer of first conductors, the second insulating layer having via openings to each of the first conductors; forming a layer of second conductors on the second insulating layer, each of said first conductors connected through a via opening to one of said second conductors; and forming test point contacts on the semiconductor wafer, each test point contact connected to one of said second conductors.

Claim 6

A method of forming an interconnection system to semiconductor devices formed on a wafer for burn-in and testing of the semiconductor devices prior to separation from a semiconductor wafer, comprising the steps of: forming a first insulating layer over the semiconductor wafer and the semiconductor devices formed thereon, each semiconductor device having a plurality of bond pads and edges defining a top surface, the first insulating layer having openings over each of the bond pads; forming a layer of first conductors over said first insulating layer, each of said first conductors overlaying an associated semiconductor device without extending past the edges defining a top surface of said associated semiconductor device, each of said first conductors connected to a bond pad on said associated semiconductor device; forming a second insulating layer over the layer of first conductors, the second insulating layer having via openings to each of the first conductors; forming a layer of second conductors on the second insulating layer, each of said first conductors connected through a via opening to one of said second conductors; and forming test point contacts on the semiconductor wafer, each test point contact connected to one of said second conductors.