EP0413451A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Packaging semiconductor chips
Assignee: STMicroelectronics Ltd
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Filing: 1990-07-25
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Granted: —
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Expires: 2010-07-25
Abstract
Abstract A semiconductor device comprising at least one semiconductor chip (4), the or each semiconductor chip having a plurality of chip bonding pads, a package (2) which encloses the at least one semiconductor chip, a first level interconnect comprising a printed circuit (8) which overlies the at least one semiconductor chip in the package and extends externally of the package to provide a plurality of outer leads (12), and a second level interconnect comprising means for electrically connecting the chip bonding pads to selected contacts on the printed circuit, which contacts overlie the at least one semiconductor chip. The invention also relates to a method of manufacturing such a semiconductor device and to a method of assembling a semiconductor assembly.
Inventors
- 👤 Elwyn Paul Michael Wakefield
- 👤 Christopher Paul Hulme Walker
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-24 03:10
CPC Classifications
H; H10; H10P; H10P74/00; H10P74/27; H10P74/273; H10P74/23; H10W; H10W70/00; H10W70/60; H10W76/00; H10W76/10; H10W76/12; H10W76/15; H10W76/157; H10W90/00; H10W72/00; H10W72/50; H10W72/541; H10W72/5449; H10W90/701; H10W90/751; H10W90/754
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
93 words
A semiconductor device comprising at least one semiconductor chip, the or each semiconductor chip having a plurality of chip bonding pads, a package which encloses the at least one semiconductor chip, a first level interconnect comprising a printed circuit which overlies the at least one semiconductor chip in the package and extends externally of the package to provide a plurality of outer leads, and a second level interconnect comprising means for electrically connecting the chip bonding pads to selected contacts on the printed circuit, which contacts overlie the at least one semiconductor chip.
Claim 2
Dependent Claim
93 words
A semiconductor device comprising at least one semiconductor chip, the or each semiconductor chip having a plurality of chip bonding pads, a package which encloses the at least one semiconductor chip, a first level interconnect comprising a printed circuit which overlies the at least one semiconductor chip in the package and extends externally of the package to provide a plurality of outer leads, and a second level interconnect comprising means for electrically connecting the chip bonding pads to selected contacts on the printed circuit, which contacts overlie the at least one semiconductor chip.
Claim 3
Dependent Claim
28 words
A semiconductor device according to claim 1 wherein the said electrical connection means is disposed within the area of the at least one semiconductor chip in the package.
Claim 4
Dependent Claim
26 words
A semiconductor device according to claim 1 or claim 2 wherein the said at least one semiconductor chip comprises a plurality of random access memories (RAMs).
Claim 5
Dependent Claim
18 words
A semiconductor device according to any one of claims 1 to 3 wherein the printed circuit is flexible.
Claim 6
Dependent Claim
44 words
A semiconductor device according to any foregoing claim wherein the printed circuit comprises a plurality of electroconductive tracks extending between opposed rows of outer leads on respective opposed ends of the printed circuit, the electroconductive tracks being supported on a layer of insulating material.
Claim 7
Dependent Claim
19 words
A semiconductor device according to claim 5 wherein the electroconductive tracks are disposed between two layers of insulating material.
Claim 8
Dependent Claim
69 words
A semiconductor device according to claim 6 wherein that one of the said two layers of insulating material which is remote from the or each semiconductor chip has holes therein which reveal the said contacts which comprise bonding pads of the electroconductive tracks, and the said electrical connection means comprises a plurality of bonding wires each of which connects a respective bonding pad to a respective chip bonding pad.
Claim 9
Dependent Claim
70 words
A semiconductor device according to claim 6 wherein the contacts are comprised of a plurality of electroconductive vias of the electroconductive tracks which vias extend through that one of the said two layers of insulating material which is remote from the or each semiconductor chip, and the said electrical connection means comprises an array of electroconductive fingers each of which connects a respective via to a respective chip bonding pad.
Claim 10
Dependent Claim
20 words
A semiconductor device according to claim 8 wherein the electroconductive fingers are formed in a tape automated bonding (TAB) process.
Claim 11
Dependent Claim
126 words
A semiconductor device according to claim 5 wherein the printed circuit further comprises a second layer of insulating material which is disposed adjacent the or each semiconductor chip, the first-mentioned layer of insulating material being located over the said second layer of insulating material and the electroconductive tracks being disposed on the side of the first-mentioned layer of insulating material which is remote from the or reach chip, the contacts being comprised of a plurality of electroconductive vias of the electroconductive tracks, which vias extend through the first-mentioned layer as far as the second layer, and the said electrical connection means comprising a plurality of connectors which are disposed between the said two layers and each connect a respective via to a respective chip bonding pad.
Claim 12
Dependent Claim
27 words
A semiconductor device according to claim 1 wherein each connector carries a solder bump by means of which it is connected to the respective chip bonding pad.
Claim 13
Independent Claim
93 words
A method of manufacturing a semiconductor device, the method comprising the steps of:- (a) disposing a first level interconnect comprising a printed circuit over at least one semiconductor chip having a plurality of chip bonding pads; (b) forming a second level interconnect by electrically connecting the chip bonding pads to selected contacts on the printed circuit, which contacts overlie the at least one semiconductor chip; and (c) enclosing the at least one semiconductor chip within a package, the printed circuit having a plurality of outer leads which are located externally of the package.
Claim 14
Independent Claim
93 words
A method of manufacturing a semiconductor device, the method comprising the steps of:- (a) disposing a first level interconnect comprising a printed circuit over at least one semiconductor chip having a plurality of chip bonding pads; (b) forming a second level interconnect by electrically connecting the chip bonding pads to selected contacts on the printed circuit, which contacts overlie the at least one semiconductor chip; and (c) enclosing the at least one semiconductor chip within a package, the printed circuit having a plurality of outer leads which are located externally of the package.
Claim 15
Dependent Claim
26 words
A method according to claim 12 wherein prior to disposing step (a) a plurality of the semiconductor chips are disposed in a part of the package.
Claim 16
Dependent Claim
55 words
A method according to claim 12 or claim 13 wherein the contacts comprise bonding pads on electroconductive tracks of the printed circuit, the bonding pads being revealed by respective holes in a layer of insulating material, and in electrical connection step (b) bond wires are connected between the bonding pads and the chip bonding pads.
Claim 17
Dependent Claim
52 words
A method according to claim 12 or claim 13 wherein the contacts comprise vias of electroconductive tracks of the printed circuit, which vias extend through a layer of insulating material, and in electrical connection step (b) a tape automated bonding (TAB) tape is connected between the vias and the chip bonding pads.
Claim 18
Dependent Claim
103 words
A method according to claim 12 or claim 13 wherein the flexible circuit comprises a first layer of insulating material, a plurality of electrical connectors disposed over the first layer, each connector having at one end thereof a solder bump, a second layer of insulating material disposed over the connectors and the first layer, and an array of electroconductive tracks disposed on the outer surface of the second layer, the tracks being provided with a plurality of vias each of which connects with a respective connector, and wherein in electrical connection step (b) the solder bumps are connected to respective chip bonding pads.
Claim 19
Independent Claim
139 words
A method of assembling a semiconductor assembly which includes a plurality of packages each package comprising a plurality of semiconductor chips, the method comprising the steps of:- (a) testing the packages to determine which semiconductor chips in each package are functional; (b) sorting the packages into N+1 functional groups, where N is the number of semiconductor chips in each package, one group comprising packages which are fully functional and each of the remaining groups comprising packages having a non-functional semiconductor chip at a respective known position; (c) selecting from at least one group a plurality of the packages for the semiconductor assembly, the selection being carried out whereby for each selected package, the group thereof is correlated with the particular assembly; and (d) assembling the semiconductor assembly in response to the at least one group of the selected packages.
Claim 20
Independent Claim
139 words
A method of assembling a semiconductor assembly which includes a plurality of packages each package comprising a plurality of semiconductor chips, the method comprising the steps of:- (a) testing the packages to determine which semiconductor chips in each package are functional; (b) sorting the packages into N+1 functional groups, where N is the number of semiconductor chips in each package, one group comprising packages which are fully functional and each of the remaining groups comprising packages having a non-functional semiconductor chip at a respective known position; (c) selecting from at least one group a plurality of the packages for the semiconductor assembly, the selection being carried out whereby for each selected package, the group thereof is correlated with the particular assembly; and (d) assembling the semiconductor assembly in response to the at least one group of the selected packages.
Claim 21
Dependent Claim
22 words
A method according to claim 17 wherein in selecting step (c) the said plurality of packages is selected from a single group.
References Cited (Backward Citations)
No citation records indexed.
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