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US5526274A
Expired / Lapsed
US
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Digital potentiometer with stackable configuration system
Assignee: Maxim Integrated Products Inc
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Filing: 1993-07-09
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Granted: 1996-06-11
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Expires: 2013-07-09
Abstract
Abstract An system containing an integrated circuit having two separate potentiometers combined on a single substrate; each potentiometer having three separate output terminals, two being connected to the ends of a resistor string, and the third being a "wiper" terminal electrically connected to a point within the length of the resistor string. All three terminals of each potentiometer electrically float with respect to the other pins of the integrated circuit. Control logic is used to select the point in the resistor string where the wiper terminal is to connect. An additional control signal is used to connect an additional wiper to one of the two separate wiper terminals permitting the connection of the two resistor strings in series.
Inventors
- 👤 Michael L. Bolan
- 👤 Robert D. Lee
- 👤 Gary V. Zanders
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 17:24
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/004; H03M1/007; G; G05; G05B; G05B24/00; G05B24/02; H03M1/66; H03M1/68; H03M1/682; H03M1/74; H03M1/76; H03M1/765; H03M1/80; H03M1/802; H03M1/804
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
188 words
A process of providing a variable impedance, comprising the following steps: providing an integrated circuit, said integrated circuit including a first passive resistor string and a second passive resistor string combined on a single semiconductor substrate; inputting a digital signal into a switching device comprising a first bit field and a second bit field and at least one higher-order command bit; evaluating said digital signal to provide a wiper output which corresponds either to a first wiper output or to a second wiper output in accordance with the state of said higher-order command bit, said first wiper output corresponds to said first bit field, and said second wiper output corresponds to said second bit field, so that a first potentiometer and a second potentiometer can optionally be combined in series to form a single potentiometer; adjusting a first wiper to a first wiper position in said first potentiometer to provide a first wiper output in response to said first bit field; and adjusting a second wiper to a second wiper position in said second potentiometer to provide a second wiper output in response to said second bit field.
Claim 2
Dependent Claim
188 words
A process of providing a variable impedance, comprising the following steps: providing an integrated circuit, said integrated circuit including a first passive resistor string and a second passive resistor string combined on a single semiconductor substrate; inputting a digital signal into a switching device comprising a first bit field and a second bit field and at least one higher-order command bit; evaluating said digital signal to provide a wiper output which corresponds either to a first wiper output or to a second wiper output in accordance with the state of said higher-order command bit, said first wiper output corresponds to said first bit field, and said second wiper output corresponds to said second bit field, so that a first potentiometer and a second potentiometer can optionally be combined in series to form a single potentiometer; adjusting a first wiper to a first wiper position in said first potentiometer to provide a first wiper output in response to said first bit field; and adjusting a second wiper to a second wiper position in said second potentiometer to provide a second wiper output in response to said second bit field.
Claim 3
Dependent Claim
95 words
The process of claim 1, wherein said first passive resistor string comprises a first plurality of tap points, wherein each tap point in said first plurality of tap points corresponds to said first wiper position, and said second passive resistor string comprises a second plurality of tap points, wherein each tap point in said first plurality of tap points corresponds to said second wiper position, said single potentiometer having a third plurality of tap points, said third plurality of tap points comprising said first plurality of tap points and said second plurality of tap points.
Claim 4
Dependent Claim
40 words
The process of claim 2, wherein said first plurality of tap points is comprised of 256 tap points and said second plurality of tap points is comprised of 256 tap points, so that said single potentiometer has 512 tap points.
Claim 5
Dependent Claim
29 words
The process of claim 1, wherein resistors in said first passive resistor string is comprised of polysilicon and resistors in said second passive resistor string is comprised of polysilicon.
Claim 6
Dependent Claim
29 words
The process of claim 1, wherein said first bit field is comprised of at least eight bits and said second bit field is comprised of at least eight bits.
Claim 7
Dependent Claim
31 words
The process of claim 1, wherein said first bit field is linearly related to said first wiper output and said second bit field is linearly related to said second wiper output.
Claim 8
Dependent Claim
149 words
The process of claim 1, wherein said first plurality of tap points are organized in series with one another and each tap point of said first plurality of tap points providing a first difference of an impedance from an immediately preceding tap point, if said immediately preceding tap point exists, or an immediately following tap point exists, if said immediately preceding tap point exists, to each tap point of said first plurality of tap points, said second plurality of tap points are organized in series with one another and each tap point of said second plurality of tap points provides a second difference of an impedance from an immediately preceding tap point, if said immediately preceding tap point exists, or an immediately following tap point of said second plurality of tap points, if said following tap point exists, to each tap point of said second plurality of tap points.
Claim 9
Dependent Claim
18 words
The process of claim 7, wherein said first difference and said second difference are equal to one another.
Claim 10
Dependent Claim
16 words
The process of claim 8, wherein said first difference and said second difference is 400 ohms.
Claim 11
Independent Claim
192 words
A system, comprising: an integrated circuit, said integrated circuit including a first passive resistor string and a second passive resistor string combined in a single semiconductor substrate; control module electrically coupled to receive a digital signal comprising a first bit field and a second bit field and at least one higher-order command bit; switching devices controlled by said control module so that said first passive resistor string is selectably electrically coupled to provide a first wiper output, said first wiper output corresponding to a first potentiometer wiper position in a first potentiometer defined by said first bit field; and said second passive resistor string is selectably electrically coupled to provide a second wiper output, said second wiper output corresponding to a second potentiometer wiper position in a second potentiometer defined by said second bit field; and a multiplexer electrically coupled to provide a wiper output which corresponds either to said first wiper output or to said second wiper output in accordance with the state of said at least one higher-order command bit so that said first potentiometer and said second potentiometer can optionally be combined in series to form a single potentiometer.
Claim 12
Independent Claim
192 words
A system, comprising: an integrated circuit, said integrated circuit including a first passive resistor string and a second passive resistor string combined in a single semiconductor substrate; control module electrically coupled to receive a digital signal comprising a first bit field and a second bit field and at least one higher-order command bit; switching devices controlled by said control module so that said first passive resistor string is selectably electrically coupled to provide a first wiper output, said first wiper output corresponding to a first potentiometer wiper position in a first potentiometer defined by said first bit field; and said second passive resistor string is selectably electrically coupled to provide a second wiper output, said second wiper output corresponding to a second potentiometer wiper position in a second potentiometer defined by said second bit field; and a multiplexer electrically coupled to provide a wiper output which corresponds either to said first wiper output or to said second wiper output in accordance with the state of said at least one higher-order command bit so that said first potentiometer and said second potentiometer can optionally be combined in series to form a single potentiometer.
Claim 13
Dependent Claim
97 words
The system of claim 10, wherein said first passive resistor string comprises a first plurality of tap points, wherein each tap point in said first plurality of tap points corresponds to said first potentiometer wiper position, and said second passive resistor string comprises a second plurality of tap points, wherein each tap point in said first plurality of tap points corresponds to said second potentiometer wiper position, said single potentiometer having a third plurality of tap points, said third plurality of tap points comprising said first plurality of tap points and said second plurality of tap points.
Claim 14
Dependent Claim
40 words
The system of claim 11, wherein said first plurality of tap points is comprised of 256 tap points and said second plurality of tap points is comprised of 256 tap points, so that said single potentiometer has 512 tap points.
Claim 15
Dependent Claim
150 words
The system of claim 11, wherein said first plurality of tap points are organized in series with one another and each tap point of said first plurality of tap points providing a first difference of an impedance from an immediately preceding tap point, if said immediately preceding tap point exists, or an immediately following tap point exists, if said immediately preceding tap point exists, to each tap point of said first plurality of tap points, said second plurality of tap points are organized in series with one another and each tap point of said second plurality of tap points provides a second difference of an impedance from an immediately preceding tap point, if said immediately preceding tap point exists, or an immediately following tap point of said second plurality of tap points, if said immediately following tap point exists, to each tap point of said second plurality of tap points.
Claim 16
Dependent Claim
18 words
The system of claim 13, wherein said first difference and said second difference are equal to one another.
Claim 17
Dependent Claim
16 words
The system of claim 14, wherein said first difference and said second difference is 400 ohms.
Claim 18
Dependent Claim
26 words
The system of claim 11, wherein said first passive resistor string and said second passive resistor string are implemented on a single monolithic piece of silicon.
Claim 19
Dependent Claim
29 words
The system of claim 10, wherein resistors in said first passive resistor string is comprised of polysilicon and resistors in said second passive resistor string is comprised of polysilicon.
Claim 20
Dependent Claim
44 words
The system of claim 10, wherein said control module comprises a serial port interface to receive said digital signal, said serial port interface comprises a shift register electrically coupled to an input node to store said digital signal as said digital signal is received.
Claim 21
Dependent Claim
29 words
The system of claim 10, wherein said first bit field is comprised of at least eight bits and said second bit field is comprised of at least eight bits.
Claim 22
Dependent Claim
24 words
The system of claim 10, wherein said control module is electrically coupled to receive exactly one of said at least one higher-order command bit.
Claim 23
Dependent Claim
33 words
The system of claim 10, wherein said first bit field is linearly related to said first potentiometer wiper output and said second bit field is linearly related to said second potentiometer wiper output.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-06-11 | 1999-12-11 | 2000-06-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-06-11 | 2003-12-11 | 2004-06-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-06-11 | 2007-12-11 | 2008-06-11 | $7700.00 | Window Closed / Lapsed |