Method for the formation of interconnects and landing pads having a thin, conductive film underlying the plug or an associated contact of via hole

Claim 1

A method for electrically contacting conductive regions of a semiconductor device comprising the steps of: providing one of a silicon substrate and an overlying insulating layer formed above a substrate having a conductive region formed at the surface thereof, the conductive region comprising one of an electrical device region formed within a substrate and an electrical contact layer formed over an overlying insulating layer; forming a first insulating layer overlying one of the substrate and the overlying insulating layer having at least one hole comprising one of a contact hole and a via hole formed through the insulating layer to expose the conductive region; forming a first conductive blanket layer overlying the first insulating layer and the exposed conductive region within the hole; forming a second conductive blanket layer overlying the first conductive blanket layer; forming a blanket plug layer overlying the second conductive blanket layer; etching the plug layer and the second conductive blanket layer in an etch process until the plug layer and the second conductive blanket layer are removed from everywhere on the surface of the first conductive blanket layer except within the hole; patterning the first conductive blanket layer with a mask; and etching the first conductive blanket layer to remove those portions of the first conductive blanket layer not covered by the mask and leave the remaining portions of the first conductive blanket layer for use as a thin film electrical contact forming one of an interconnect and a landing pad.

Claim 2

A method for electrically contacting conductive regions of a semiconductor device comprising the steps of: providing one of a silicon substrate and an overlying insulating layer formed above a substrate having a conductive region formed at the surface thereof, the conductive region comprising one of an electrical device region formed within a substrate and an electrical contact layer formed over an overlying insulating layer; forming a first insulating layer overlying one of the substrate and the overlying insulating layer having at least one hole comprising one of a contact hole and a via hole formed through the insulating layer to expose the conductive region; forming a first conductive blanket layer overlying the first insulating layer and the exposed conductive region within the hole; forming a second conductive blanket layer overlying the first conductive blanket layer; forming a blanket plug layer overlying the second conductive blanket layer; etching the plug layer and the second conductive blanket layer in an etch process until the plug layer and the second conductive blanket layer are removed from everywhere on the surface of the first conductive blanket layer except within the hole; patterning the first conductive blanket layer with a mask; and etching the first conductive blanket layer to remove those portions of the first conductive blanket layer not covered by the mask and leave the remaining portions of the first conductive blanket layer for use as a thin film electrical contact forming one of an interconnect and a landing pad.

Claim 9

A method for the formation of interconnects and landing pads comprising the steps of: providing one of a silicon substrate and an overlying insulating layer formed above a substrate having a conductive region formed at the surface thereof, the conductive region comprising one of an electrical device region formed within a substrate and an electrical contact layer formed over an overlying insulating layer; forming a first insulating layer overlying one of the substrate and the overlying insulating layer having at least one hole formed in the first insulating layer comprising one of a contact hole and a via hole formed through the insulating layer to expose the conductive region; forming a first blanket layer as a tungsten adhesion layer comprising titanium overlying the first insulating layer and the exposed conductive region within the hole, the tungsten adhesion layer having a thickness of between 500 and 2,000 Angstroms; forming a second blanket layer as a tungsten barrier layer comprising one of titanium-tungsten and titanium-nitride overlying the adhesion layer, the tungsten barrier layer having a thickness of between 100 and 1,000 Angstroms; forming a blanket plug layer comprising tungsten overlying the barrier layer, the plug layer having a thickness of between 5,000 and 10,000 Angstroms; selectively etching the plug layer and the barrier layer in a tungsten etching machine until both the plug layer and the barrier layer are removed from the surface of the adhesion layer everywhere except within the hole, the etch having a selectivity between tungsten and titanium of approximately 5:1 by use of a SF6 gas chemistry and etch parameters comprising a gas flow of 100 to 300 sccm, a chamber pressure of 200 to 400 mTorr, a 13.56 RF power of 350 to 550 Watts and a chamber temperature of 30° to 50° Celsius; patterning an exposed portion of the adhesion layer with a mask; and etching the exposed portion of the adhesion layer in a plasma etch chamber to remove those portions of the adhesion layer not covered by the mask and form one of an interconnect and a landing pad making contact to the plug layer within the hole.

Claim 10

A method for the formation of interconnects and landing pads comprising the steps of: providing one of a silicon substrate and an overlying insulating layer formed above a substrate having a conductive region formed at the surface thereof, the conductive region comprising one of an electrical device region formed within a substrate and an electrical contact layer formed over an overlying insulating layer; forming a first insulating layer overlying one of the substrate and the overlying insulating layer having at least one hole formed in the first insulating layer comprising one of a contact hole and a via hole formed through the insulating layer to expose the conductive region; forming a first blanket layer as a tungsten adhesion layer comprising titanium overlying the first insulating layer and the exposed conductive region within the hole, the tungsten adhesion layer having a thickness of between 500 and 2,000 Angstroms; forming a second blanket layer as a tungsten barrier layer comprising one of titanium-tungsten and titanium-nitride overlying the adhesion layer, the tungsten barrier layer having a thickness of between 100 and 1,000 Angstroms; forming a blanket plug layer comprising tungsten overlying the barrier layer, the plug layer having a thickness of between 5,000 and 10,000 Angstroms; selectively etching the plug layer and the barrier layer in a tungsten etching machine until both the plug layer and the barrier layer are removed from the surface of the adhesion layer everywhere except within the hole, the etch having a selectivity between tungsten and titanium of approximately 5:1 by use of a SF6 gas chemistry and etch parameters comprising a gas flow of 100 to 300 sccm, a chamber pressure of 200 to 400 mTorr, a 13.56 RF power of 350 to 550 Watts and a chamber temperature of 30° to 50° Celsius; patterning an exposed portion of the adhesion layer with a mask; and etching the exposed portion of the adhesion layer in a plasma etch chamber to remove those portions of the adhesion layer not covered by the mask and form one of an interconnect and a landing pad making contact to the plug layer within the hole.

Claim 16

A method for electrically contacting conductive regions of a semiconductor device comprising the steps of: providing one of a silicon substrate and an overlying insulating layer formed above a substrate having a conductive region formed at the surface thereof, the conductive region comprising one of an electrical device region formed within a substrate and an electrical contact layer formed over an overlying insulating layer; forming a first insulating layer overlying one of the substrate and the overlying insulating layer having at least one hole comprising one of a contact hole and a via hole formed through the insulating layer to expose the conductive region; forming a first conductive blanket layer overlying the first insulating layer and the exposed conductive region within the hole, the first conductive blanket layer comprising a material selected from the group consisting of titanium, titanium-tungsten, copper, tantalum, chromium, cobalt, platinum, and molybdenum; forming a second conductive blanket layer overlying the first conductive blanket layer; forming a blanket plug layer overlying the first conductive blanket layer; etching the plug layer in an etch process until the plug layer is removed from everywhere on the surface of the first conductive blanket layer except within the hole; patterning the first conductive blanket layer with a mask; and etching the first conductive blanket layer to remove those portions of the first conductive blanket layer not covered by the mask and leave the remaining portions of the first conductive blanket layer for use as a thin film electrical contact forming one of an interconnect and a landing pad, the first conductive blanket layer forming the sole conductive layer of the one of the interconnect and the landing pad, wherein the etch process of the step of etching the contact plug layer comprises a fluorinated etch chemistry, and further comprises etching the second conductive blanket layer until the second conductive blanket layer is removed from the surface of the first conductive blanket layer except within the hole.

Claim 17

A method for electrically contacting conductive regions of a semiconductor device comprising the steps of: providing one of a silicon substrate and an overlying insulating layer formed above a substrate having a conductive region formed at the surface thereof, the conductive region comprising one of an electrical device region formed within a substrate and an electrical contact layer formed over an overlying insulating layer; forming a first insulating layer overlying one of the substrate and the overlying insulating layer having at least one hole comprising one of a contact hole and a via hole formed through the insulating layer to expose the conductive region; forming a first conductive blanket layer overlying the first insulating layer and the exposed conductive region within the hole, the first conductive blanket layer comprising a material selected from the group consisting of titanium, titanium-tungsten, copper, tantalum, chromium, cobalt, platinum, and molybdenum; forming a second conductive blanket layer overlying the first conductive blanket layer; forming a blanket plug layer overlying the first conductive blanket layer; etching the plug layer in an etch process until the plug layer is removed from everywhere on the surface of the first conductive blanket layer except within the hole; patterning the first conductive blanket layer with a mask; and etching the first conductive blanket layer to remove those portions of the first conductive blanket layer not covered by the mask and leave the remaining portions of the first conductive blanket layer for use as a thin film electrical contact forming one of an interconnect and a landing pad, the first conductive blanket layer forming the sole conductive layer of the one of the interconnect and the landing pad, wherein the etch process of the step of etching the contact plug layer comprises a fluorinated etch chemistry, and further comprises etching the second conductive blanket layer until the second conductive blanket layer is removed from the surface of the first conductive blanket layer except within the hole.