US5286518A
Expired / Lapsed
US
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Integrated-circuit processing with progressive intermetal-dielectric deposition
Assignee: Philips Semiconductors Inc
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Filing: 1992-04-30
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Granted: 1994-02-15
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Expires: 2012-04-30
Abstract
Abstract A semiconductor processing method provides for plasma-enhanced chemical-vapor deposition (PECVD) for intermetal dielectrics while minimizing risk of gate oxide impairment due to plasma discharge. A protective oxide sublayer is deposited without using high-power PECVD. The protective sublayer can be deposited by using chemical-vapor deposition (CVD) without plasma enhancement or by a lower-power PECVD. In the latter case, the initial rf power of the plasma is selected to be low enough to ensure that the gate oxide is not breached in the event of a plasma discharge. The protective sublayer can be thick enough to maintain its integrity in the event of a plasma discharge even during a higher-power PECVD deposition.
Inventors
- 👤 John Cain
- 👤 Felix Fujishiro
- 👤 Chang-Ou Lee
- 👤 Sigmund Koenigseder
- 👤 Landon Vines
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 06:02
CPC Classifications
C; C23; C23C; C23C16/00; C23C16/44; C23C16/50; C23C16/505; H; H10; H10W; H10W20/00; H10W20/01; H10W20/071
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
134 words
A method of fabricating a multi-metalization-layer integrated circuit, said method comprising the steps of: fabricating an integrated circuit through patterning a first metalization layer; depositing a protective oxide sublayer over said first metalization by chemical vapor deposition while restricting any plasma enhancement to the chemical vapor deposition to an rf power of at most 200 watts; depositing a bulk dielectric oxide sublayer over said protective oxide sublayer by a plasma-enhanced chemical-vapor deposition in which the rf power is greater than 200 watts, said bulk dielectric oxide sublayer being thicker than said protective oxide sublayer, said protective oxide sublayer and said bulk dielectric oxide sublayer collectively constituting a dielectric layer; defining via apertures through said dielectric layer; and patterning a second metalization over said dielectric layer so as to define interconnects for said integrated circuit.
Claim 2
Independent Claim
134 words
A method of fabricating a multi-metalization-layer integrated circuit, said method comprising the steps of: fabricating an integrated circuit through patterning a first metalization layer; depositing a protective oxide sublayer over said first metalization by chemical vapor deposition while restricting any plasma enhancement to the chemical vapor deposition to an rf power of at most 200 watts; depositing a bulk dielectric oxide sublayer over said protective oxide sublayer by a plasma-enhanced chemical-vapor deposition in which the rf power is greater than 200 watts, said bulk dielectric oxide sublayer being thicker than said protective oxide sublayer, said protective oxide sublayer and said bulk dielectric oxide sublayer collectively constituting a dielectric layer; defining via apertures through said dielectric layer; and patterning a second metalization over said dielectric layer so as to define interconnects for said integrated circuit.
Claim 3
Dependent Claim
19 words
A method as recited in claim 1 wherein said protective oxide sublayer is deposited using plasma-enhanced chemical vapor deposition.
Claim 4
Dependent Claim
21 words
A method as recited in claim 2 wherein said protective oxide sublayer is deposited with an rf power below 150 watts.
Claim 5
Dependent Claim
24 words
A method as recited in claim 3 wherein said protective oxide sublayer is deposited with an rf power of no more than 100 watts.
Claim 6
Dependent Claim
23 words
A method as recited in claim 1 wherein said protective oxide sublayer is deposited using low-pressure chemical vapor deposition without said plasma enhancement.
Claim 7
Dependent Claim
24 words
A method as recited in claim 1 wherein said protective oxide sublayer is deposited using rapid-thermal low-pressure chemical vapor deposition without said plasma enhancement.
Claim 8
Dependent Claim
32 words
A method as recited in claim 1 wherein said protective oxide sublayer is between 500 Å and 1000 Å thick and wherein said bulk dielectric layer is at least 2500 Å thick.
Claim 9
Dependent Claim
21 words
A method as recited in claim 1 wherein said bulk dielectric layer is etched back before said second metalization is patterned.
Claim 10
Dependent Claim
31 words
A method as recited in claim 2 wherein the rf power applied during said protective oxide step is gradually increased to 200 watts and above thereby initiating said bulk dielectric step.
Claim 11
Dependent Claim
21 words
A method as recited in claim 1 wherein said bulk dielectric step uses a rf power of at least 300 watts.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-02-14 | 1997-08-16 | 1998-02-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-02-14 | 2001-08-16 | 2002-02-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-02-14 | 2005-08-16 | 2006-02-15 | $7700.00 | Window Closed / Lapsed |