Patent US5504376A successfully refreshed from Google Patents.
US5504376A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Stacked-type semiconductor device
Assignee: Renesas Electronics Corp
•
Filing: 1994-04-04
•
Granted: 1996-04-02
•
Expires: 2014-04-04
Abstract
Abstract In a method of manufacturing a stacked-type semiconductor device, firstly, a first semiconductor substrate having a first device formed thereon is covered with an interlayer insulating layer and a planarized polycrystalline silicon layer is formed on the interlayer insulating layer. The first semiconductor substrate and a second semiconductor substrate are joined together by putting the surface of the polycrystalline silicon layer in close contact with the surface of a refractory metal layer formed on the second semiconductor substrate, applying thermal treatment at 700 DEG C. or below and changing the refractory metal layer to silicide.
Inventors
- 👤 Kazuyuki Sugahara
- 👤 Natsuo Ajika
- 👤 Toshiaki Ogawa
- 👤 Toshiaki Iwamatsu
- 👤 Takashi Ipposhi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 02:30
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/02; H10D84/03; H10D84/038; H10P; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10P90/1914; H10D88/00; H10D88/01; H10W; H10W10/00; H10W10/10; H10W10/181
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
98 words
A stacked-type semiconductor device comprising: a first semiconductor substrate having a main surface; a silicon layer on said main surface of said first semiconductor substrate, said silicon layer having an upper surface and a lower surface facing said main surface; a refractory metal silicide layer on said upper surface of said silicon layer, said refractory metal silicide layer having an upper surface and a lower surface facing said upper surface of said silicon layer; and a second semiconductor substrate having an upper surface, and a lower surface joined to said upper surface of said refractory metal silicide layer.
Claim 2
Dependent Claim
98 words
A stacked-type semiconductor device comprising: a first semiconductor substrate having a main surface; a silicon layer on said main surface of said first semiconductor substrate, said silicon layer having an upper surface and a lower surface facing said main surface; a refractory metal silicide layer on said upper surface of said silicon layer, said refractory metal silicide layer having an upper surface and a lower surface facing said upper surface of said silicon layer; and a second semiconductor substrate having an upper surface, and a lower surface joined to said upper surface of said refractory metal silicide layer.
Claim 3
Dependent Claim
36 words
A stacked-type semiconductor device according to claim 1, wherein at least one of said upper surface of said first semiconductor substrate and said main surface of said second semiconductor substrate has an electronic device formed thereon.
Claim 4
Dependent Claim
15 words
A stacked-type semiconductor device according to claim 1, wherein said silicon layer comprises polycrystalline silicon.
Claim 5
Dependent Claim
55 words
A stacked-type semiconductor device comprising: a semiconductor substrate having a main surface; a double layer comprising a silicon portion and a refractory metal silicide portion on the entire main surface of said semiconductor substrate; an insulation layer on said double layer; and a device layer comprising at least one electronic device on said insulation layer.
Claim 6
Dependent Claim
55 words
A stacked-type semiconductor device comprising: a semiconductor substrate having a main surface; a double layer comprising a silicon portion and a refractory metal silicide portion on the entire main surface of said semiconductor substrate; an insulation layer on said double layer; and a device layer comprising at least one electronic device on said insulation layer.
Claim 7
Dependent Claim
27 words
A stacked-type semiconductor device according to claim 4, wherein said double layer comprises a stack-type structure of a polycrystalline silicon layer and a refractory metal silicide layer.
Claim 8
Dependent Claim
21 words
The stacked-type semiconductor device according to claim 4, wherein the other main surface of said semiconductor substrate comprises an electronic device.
Claim 9
Dependent Claim
54 words
A stacked-type semiconductor device comprising: a semiconductor substrate having a main surface: a double layer comprising a silicon portion and a silicon nitride portion on the entire main surface of said semiconductor substrate; an insulation layer on said double layer; and a device layer comprising at least one electronic device on said insulation layer.
Claim 10
Dependent Claim
54 words
A stacked-type semiconductor device comprising: a semiconductor substrate having a main surface: a double layer comprising a silicon portion and a silicon nitride portion on the entire main surface of said semiconductor substrate; an insulation layer on said double layer; and a device layer comprising at least one electronic device on said insulation layer.
Claim 11
Dependent Claim
26 words
The stacked-type semiconductor device according to claim 7, wherein said double layer comprises a stacked-structure of a polycrystalline silicon layer and a silicon nitride film layer.
Claim 12
Dependent Claim
30 words
The stacked-type semiconductor device according to claim 7, wherein said silicon nitride portion of said double layer includes a stable phase of silicon nitride (Si 3 N 4 ) equivalent.
Claim 13
Dependent Claim
21 words
The stacked-type semiconductor device according to claim 7, wherein the other main surface of said semiconductor substrate comprises an electronic device.
Claim 14
Dependent Claim
25 words
A stacked-type semiconductor device according to claim 1, wherein said second semiconductor substrate is joined to said refractory metal silicide layer through an insulating layer.
References Cited (Backward Citations)
US4398341A
Cited
JPS603148A
Cited
EP0168815A2
Cited
US4612083A
Cited
US4800177A
Cited
US4983251A
Cited
EP0238066A2
Cited
US4826787A
Cited
US4939568A
Cited
US4845544A
Cited
US5025301A
Cited
US5003375A
Cited
US5006913A
Cited
JPH0316787A
Cited
JPH03108776A
Cited
US5189500A
Cited
US5170242A
Cited
US5355022A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-04-02 | 1999-10-02 | 2000-04-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-04-02 | 2003-10-02 | 2004-04-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-04-02 | 2007-10-02 | 2008-04-02 | $7700.00 | Window Closed / Lapsed |