Patent US5412336A successfully refreshed from Google Patents.
US5412336A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Self-biasing boot-strapped cascode amplifier
Assignee: Motorola Solutions Inc
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Filing: 1993-11-10
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Granted: 1995-05-02
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Expires: 2013-11-10
Abstract
Abstract A cascode amplifier circuit including an input mirroring transistor (401) that generates a first output current (403) in response to the input signal. A diode connected transistor (404) generates a control bias proportional to the first output current. A cascode connected transistor output stage (405) includes a common source transistor (406) coupled to the input signal and the input mirroring transistor (401) for establishing an output current (407) in the cascode connected transistor output stage. A common gate transistor (408) is coupled to the diode connected transistor (404) and the common source transistor (406) for isolating the common source transistor (406) from any change in an output voltage present at an output terminal (409) of the common gate transistor (408) while operating to control the output currently(407) in response to the control bias.
Inventors
- 👤 Raymond L. Barrett, Jr.
- 👤 Barry W. Herold
- 👤 Grazyna A. Pajunen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 04:06
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/08; H03F1/22; H03F1/223
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
185 words
A cascode amplifier circuit comprising: an input mirroring transistor having a control node coupled to an input signal, the input mirroring transistor generating a first output current in response to the input signal; a current mirror coupled to the input mirroring transistor, the current mirror operating to generate a second output current that is proportional to the first output current, the second output current being coupled to a diode connected transistor for generating a control bias; a cascode connected transistor output stage coupled to the input mirroring transistor and the diode connected, transistor, the cascode connected transistor output stage comprising: a common source transistor coupled to the input signal and the input mirroring transistor for establishing an output operating current in the cascode connected transistor output stage; and a common gate transistor coupled to the diode connected transistor and the common source transistor for isolating the common source transistor from any change in an output voltage present at an output terminal of the common gate transistor while operating to control an output current conducted by the common gate transistor in response to the control bias.
Claim 2
Dependent Claim
185 words
A cascode amplifier circuit comprising: an input mirroring transistor having a control node coupled to an input signal, the input mirroring transistor generating a first output current in response to the input signal; a current mirror coupled to the input mirroring transistor, the current mirror operating to generate a second output current that is proportional to the first output current, the second output current being coupled to a diode connected transistor for generating a control bias; a cascode connected transistor output stage coupled to the input mirroring transistor and the diode connected, transistor, the cascode connected transistor output stage comprising: a common source transistor coupled to the input signal and the input mirroring transistor for establishing an output operating current in the cascode connected transistor output stage; and a common gate transistor coupled to the diode connected transistor and the common source transistor for isolating the common source transistor from any change in an output voltage present at an output terminal of the common gate transistor while operating to control an output current conducted by the common gate transistor in response to the control bias.
Claim 3
Dependent Claim
139 words
The cascode amplifier circuit according to claim 1 wherein the current mirror comprises: a diode connected mirror transistor having a bias node coupled to a voltage bias and a diode connected node coupled to a conduction node of the input mirroring transistor, the diode connected mirror transistor operating at the first output current; and a current mirroring transistor having a control node coupled to the diode connected node of the diode connected mirror transistor and a conduction node coupled to diode connected node of the diode connected transistor, the current mirroring transistor operating to conduct the second output current between the voltage bias and the diode connected node of the diode connected transistor at a magnitude determined at least in part by a ratio of effective device geometries between the diode connected mirror transistor and the current mirroring transistor.
Claim 4
Dependent Claim
41 words
The cascode amplifier circuit according to claim 2 wherein the ratio of effective device geometries between the diode connected mirror transistor and the current mirroring transistor controls a current gain realized between the first output current and the second output current.
Claim 5
Dependent Claim
31 words
The cascode amplifier circuit according to claim 1 wherein the cascode amplifier circuit is part of an active function circuit included in a control circuit for a radio frequency communication device.
Claim 6
Dependent Claim
205 words
A cascode amplifier circuit comprising: an input mirror transistor having a control node coupled to an input signal, the input mirroring transistor generating a first output current in response to the input signal; a current mirror coupled to the input mirroring transistor, the current mirror operating to generate a second output current that is proportional to the first output current; a diode connected transistor coupled to the current mirror for generating a control bias in response to the second output current and the first output current that is directly coupled from the input mirroring transistor; and a cascode connected transistor output stage coupled to the input mirroring transistor and the diode connected transistor, the cascode connected transistor output stage comprising: a common source transistor coupled to the input signal and the input mirroring transistor for establishing an output operating current in the cascode connected transistor output stage; and a common gate transistor coupled to the diode connected transistor and the common source transistor for isolating the common source transistor from any change in an output voltage present at an output terminal of the common gate transistor while operating to control an output current conducted by the common gate transistor in response to the control bias.
Claim 7
Dependent Claim
205 words
A cascode amplifier circuit comprising: an input mirror transistor having a control node coupled to an input signal, the input mirroring transistor generating a first output current in response to the input signal; a current mirror coupled to the input mirroring transistor, the current mirror operating to generate a second output current that is proportional to the first output current; a diode connected transistor coupled to the current mirror for generating a control bias in response to the second output current and the first output current that is directly coupled from the input mirroring transistor; and a cascode connected transistor output stage coupled to the input mirroring transistor and the diode connected transistor, the cascode connected transistor output stage comprising: a common source transistor coupled to the input signal and the input mirroring transistor for establishing an output operating current in the cascode connected transistor output stage; and a common gate transistor coupled to the diode connected transistor and the common source transistor for isolating the common source transistor from any change in an output voltage present at an output terminal of the common gate transistor while operating to control an output current conducted by the common gate transistor in response to the control bias.
Claim 8
Dependent Claim
140 words
The cascode amplifier circuit according to claim 5 wherein the current mirror comprises: a diode connected mirror transistor having a bias node coupled to a voltage bias and a diode connected node coupled to a conduction node of the input mirroring transistor, the diode connected mirror transistor operating at the first output current; and a current mirroring transistor having a control node coupled to the diode connected node of the diode connected mirror transistor and a conduction node coupled to a diode connected node of the diode connected transistor, the current mirroring transistor operating to conduct the second output current between the voltage bias and the diode connected node of the diode connected transistor at a magnitude determined at least in part by a ratio of effective device geometries between the diode connected mirror transistor and the current mirroring transistor.
Claim 9
Dependent Claim
41 words
The cascode amplifier circuit according to claim 6 wherein the ratio of effective device geometries between the diode connected mirror transistor and the current mirroring transistor controls a current gain realized between the first output current and the second output current.
Claim 10
Dependent Claim
31 words
The cascode amplifier circuit according to claim 5 wherein the cascode amplifier circuit is part of an active function circuit included in a control circuit for a radio frequency communication device.
Claim 11
Dependent Claim
257 words
A radio frequency communication device, comprising: a control circuit for managing information communication by the radio frequency communication device, the control circuit comprising: at least one active function circuit that implements command and control functions associated with the radio frequency communication device, the at least one active function circuit including at least one cascode amplifier circuit, comprising: an input mirroring transistor having a control node coupled to an input signal, the input mirroring transistor generating a first output current in response to the input signal; a current mirror coupled to the input mirroring transistor, the current mirror operating to generate a second output current that is proportional to the first output current; a diode connected transistor coupled to the current mirror for generating a control bias in response to the second output current and the first output current that is directly coupled from the input mirroring transistor; and a cascode connected transistor output stage coupled to the input mirroring transistor and the diode connected transistor, the cascode connected transistor output stage comprising: a common source transistor coupled to the input signal and the input mirroring transistor for establishing an output operating current in the cascode connected transistor output stage; and a common gate transistor coupled to the diode connected transistor and the common source transistor for isolating the common source transistor from any change in an output voltage present at an output terminal of the common gate transistor while operating to control an output current conducted by the common gate transistor in response to the control bias.
Claim 12
Dependent Claim
257 words
A radio frequency communication device, comprising: a control circuit for managing information communication by the radio frequency communication device, the control circuit comprising: at least one active function circuit that implements command and control functions associated with the radio frequency communication device, the at least one active function circuit including at least one cascode amplifier circuit, comprising: an input mirroring transistor having a control node coupled to an input signal, the input mirroring transistor generating a first output current in response to the input signal; a current mirror coupled to the input mirroring transistor, the current mirror operating to generate a second output current that is proportional to the first output current; a diode connected transistor coupled to the current mirror for generating a control bias in response to the second output current and the first output current that is directly coupled from the input mirroring transistor; and a cascode connected transistor output stage coupled to the input mirroring transistor and the diode connected transistor, the cascode connected transistor output stage comprising: a common source transistor coupled to the input signal and the input mirroring transistor for establishing an output operating current in the cascode connected transistor output stage; and a common gate transistor coupled to the diode connected transistor and the common source transistor for isolating the common source transistor from any change in an output voltage present at an output terminal of the common gate transistor while operating to control an output current conducted by the common gate transistor in response to the control bias.
Claim 13
Dependent Claim
141 words
The radio frequency communication device according to claim 9 wherein the current mirror comprises: a diode connected mirror transistor having a bias node coupled to a voltage bias and a diode connected node coupled to a conduction node of the input mirroring transistor, the diode connected mirror transistor operating at the first output current; and a current mirroring transistor having a control node coupled to the diode connected node of the diode connected mirror transistor and a conduction node coupled to a diode connected node of the diode connected transistor, the current mirroring transistor operating to conduct the second output current between the voltage bias and the diode connected node of the diode connected transistor at a magnitude determined at least in part by a ratio of effective device geometries between the diode connected mirror transistor and the current mirroring transistor.
Claim 14
Dependent Claim
42 words
The radio frequency communication device according to claim 10 wherein the ratio of effective device geometries between the diode connected mirror transistor and the current mirroring transistor controls a current gain realized between the first output current and the second output current.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-05-01 | 1998-10-31 | 1999-05-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-05-01 | 2002-10-31 | 2003-05-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-05-01 | 2006-10-31 | 2007-05-02 | $7700.00 | Window Closed / Lapsed |