US4825018A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Voltage detection circuit
Assignee: Panasonic Holdings Corp
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Filing: 1988-05-20
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Granted: 1989-04-25
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Expires: 2008-05-20
Abstract
Abstract In a voltage detection circuit, at least a portion of the gate insulation film of a voltage detecting transistor is formed thicker than the other portion of the gate insulation film. Such voltage detecting transistor can be fabricated on a semiconductor substrate in the same process as conventional MOS transistors, so that the extra mask or process is not required. And since the amount of trapped electron does not change due to the passing of time, aging effects for detection precision is small.
Inventors
- 👤 Yasuyuki Okada
- 👤 Makoto Kojima
- 👤 Hirozumi Misaki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 17:13
CPC Classifications
G; G01; G01R; G01R19/00; G01R19/165; G01R19/16504; G01R19/16519; H; H10; H10D; H10D64/00; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10D64/511; H10D64/514; H10D64/516; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/83125; H10D84/8311
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
98 words
A voltage detection circuit comprising: a serially connected voltage detecting transistor and a load between a constant voltage power supply terminal and a reference potential, in which at least a portion of gate insulation film of a gate of said voltage detecting transistor is formed thick; and a logic gate whose input terminal is connected to a connecting point of said voltage detection transistor and said load; whereby, when potential applied to said gate of said voltage detection transistor reaches a predetermined voltage, an output from said logic gate is inverted by a potential of said connecting point.
Claim 2
Dependent Claim
98 words
A voltage detection circuit comprising: a serially connected voltage detecting transistor and a load between a constant voltage power supply terminal and a reference potential, in which at least a portion of gate insulation film of a gate of said voltage detecting transistor is formed thick; and a logic gate whose input terminal is connected to a connecting point of said voltage detection transistor and said load; whereby, when potential applied to said gate of said voltage detection transistor reaches a predetermined voltage, an output from said logic gate is inverted by a potential of said connecting point.
Claim 3
Dependent Claim
78 words
A voltage detection circuit according to claim 1, wherein said voltage detecting transistor comprises diffusion layers which are source and drain regions formed in a semiconductor substrate, a gate insulation thick film formed on a surface of said semiconductor substrate including at least a center portion thereof between said source and drain regions, a gate insulation thin film formed on at least said gate insulation thick film, and a gate electrode formed on said gate insulation thin film.
Claim 4
Dependent Claim
35 words
A voltage detection circuit according to claim 1, wherein a predetermined electric current is supplied from said load to said voltage detecting transistor so that a temperature dependence of said voltage detecting transistor is minimum.
Claim 5
Dependent Claim
21 words
A voltage detection circuit according to claim 1, wherein a second load is connected electrically parallel to said voltage detecting transistor.
Claim 6
Dependent Claim
35 words
A voltage detection circuit according to claim 2, wherein a predetermined electric current is supplied from said load to said voltage detecting transistor so that a temperature dependance of said voltage detecting transistor is minimum.
Claim 7
Dependent Claim
21 words
A voltage detection circuit according to claim 2, wherein a second load is connected electrically parallel to said voltage detecting transistor.
Claim 8
Dependent Claim
21 words
A voltage detection circuit according to claim 3, wherein a second load is connected electrically parallel to said voltage detecting transistor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-04-24 | 1992-10-24 | 1993-04-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-04-24 | 1996-10-24 | 1997-04-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-04-24 | 2000-10-24 | 2001-04-25 | $7700.00 | Window Closed / Lapsed |