Patent US4915779A successfully refreshed from Google Patents.
Patent US5374836A successfully refreshed from Google Patents.
US5374836A
Expired / Lapsed
US
⏱️ 0.0 years remaining
High current fermi threshold field effect transistor
Assignee: Thunderbird Technologies Inc
•
Filing: 1993-02-23
•
Granted: 1994-12-20
•
Expires: 2013-02-23
Abstract
Abstract A high current Fermi-FET includes an injector region of the same conductivity type as the Fermi-Tub region and the source and drain regions, located adjacent the source region and facing the drain region. The injector region is preferably doped at a doping level which is intermediate the relatively low doping concentration of the Fermi-Tub and the relatively high doping concentration of the source region. The injector region controls the depth of the carriers injected into the channel and maximizes injection of carriers into the channel at a predetermined depth below the gate. The injector region may also extend to the Fermi-tub depth to decrease bottom leakage current. Alternatively, a bottom leakage current control region may be used to decrease bottom leakage current. Lower pinch-off voltage and increased saturation current are obtained by providing a gate sidewall spacer which extends from adjacent the source injector region to adjacent the sidewall of the polysilicon gate electrode of the Fermi-FET. The gate sidewall spacer preferably comprises an insulator having permittivity which is greater than the permittivity of the gate insulating layer.
Inventors
- 👤 Albert W. Vinal
- 👤 Michael W. Dennen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 15:11
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/17; H10D62/351; H10D62/357; H10D62/364; H10D30/00; H10D30/60; H10D30/637; H10P; H10P30/00; H10P30/20; H10P30/222; Y; Y10; Y10S; Y10S257/00; Y10S257/90
Claims Analysis
Total Claims: 155
Claim 1
Independent Claim
117 words
A field effect transistor comprising: a semiconductor substrate of first conductivity type; a tub region of second conductivity type in said substrate at a surface thereof; spaced apart source and drain regions of said second conductivity type in said tub region at said substrate surface; a source injector region of said second conductivity type, adjacent said source region and facing said drain region; a gate insulating layer on said substrate at said substrate surface, between said spaced apart source and drain regions; source, drain and gate electrodes contacting said source and drain regions and said gate insulating layer, respectively; and a substrate contact region of said first conductivity type in said tub region at said substrate surface.
Claim 2
Dependent Claim
117 words
A field effect transistor comprising: a semiconductor substrate of first conductivity type; a tub region of second conductivity type in said substrate at a surface thereof; spaced apart source and drain regions of said second conductivity type in said tub region at said substrate surface; a source injector region of said second conductivity type, adjacent said source region and facing said drain region; a gate insulating layer on said substrate at said substrate surface, between said spaced apart source and drain regions; source, drain and gate electrodes contacting said source and drain regions and said gate insulating layer, respectively; and a substrate contact region of said first conductivity type in said tub region at said substrate surface.
Claim 3
Dependent Claim
66 words
The field effect transistor of claim 1 wherein said tub region is doped said second conductivity type at a relatively low doping concentration, wherein said source region is doped said second conductivity type at a relatively high doping concentration, and wherein said source injector region is doped said second conductivity type at an intermediate doping concentration between that of said tub region and said source region.
Claim 4
Dependent Claim
29 words
The field effect transistor of claim 1 further comprising a gate sidewall spacer on said substrate surface, extending from adjacent said source injector region to adjacent said gate electrode.
Claim 5
Dependent Claim
28 words
The field effect transistor of claim 3 wherein said gate sidewall spacer comprises an insulator having permittivity which is greater than the permittivity of said gate insulating layer.
Claim 6
Dependent Claim
24 words
The field effect transistor of claim 4 wherein said gate insulating layer comprises silicon dioxide and wherein said gate sidewall spacer comprises silicon nitride.
Claim 7
Dependent Claim
58 words
The field effect transistor of claim 3 wherein said gate electrode includes a polysilicon gate electrode layer of said first conductivity type on said gate insulating layer opposite said substrate surface, said polysilicon gate electrode layer including a polysilicon sidewall, and wherein said gate sidewall spacer extends from adjacent said source injector region to adjacent said polysilicon sidewall.
Claim 8
Dependent Claim
28 words
The field effect transistor of claim 6 wherein said gate sidewall spacer comprises an insulator having permittivity which is greater than the permittivity of said gate insulating layer.
Claim 9
Dependent Claim
24 words
The field effect transistor of claim 7 wherein said gate insulating layer comprises silicon dioxide and wherein said gate sidewall spacer comprises silicon nitride.
Claim 10
Dependent Claim
49 words
The field effect transistor of claim 3 wherein said source injector region extends to said substrate surface, wherein said gate insulating layer extends onto said source injector region at said substrate surface, and wherein said gate sidewall spacer also extends onto said source injector region at said substrate surface.
Claim 11
Dependent Claim
28 words
The field effect transistor of claim 9 wherein said gate sidewall spacer comprises an insulator having permittivity which is greater than the permittivity of said gate insulating layer.
Claim 12
Dependent Claim
24 words
The field effect transistor of claim 10 wherein said gate insulating layer comprises silicon dioxide and wherein said gate sidewall spacer comprises silicon nitride.
Claim 13
Dependent Claim
80 words
The field effect transistor of claim 1 wherein said tub extends into said substrate a first predetermined depth from said substrate surface, said field effect transistor further comprising a bottom leakage controlling region of said first conductivity type in said substrate, extending across said substrate between extensions of said source and drain regions, and extending into said substrate from a second depth which is less than said first depth, to a third depth which is greater than said first depth.
Claim 14
Dependent Claim
41 words
The field effect transistor of claim 12 wherein said substrate is doped said first conductivity type at a relatively low doping concentration and wherein said bottom leakage control region is doped said first conductivity type at a relatively high doping concentration.
Claim 15
Dependent Claim
64 words
The field effect transistor of claim 1 wherein said tub extends into said substrate a first predetermined depth from said substrate surface; wherein said source region extends into said substrate a second predetermined depth from said substrate surface; and wherein said source injector region extends into said substrate a third predetermined depth which is between said second predetermined depth and said first predetermined depth.
Claim 16
Dependent Claim
36 words
The field effect transistor of claim 1 wherein said tub extends into said substrate a predetermined depth from said substrate surface and wherein said source injector region also extends into said substrate to said predetermined depth.
Claim 17
Dependent Claim
84 words
The field effect transistor of claim 1 further comprising a channel of said second conductivity type in said tub region at said substrate surface, between said spaced apart source and drain regions; wherein said channel extends a first predetermined depth from said substrate surface and said tub region extends a second predetermined depth from said channel, at least one of said first and second predetermined depths being selected to produce zero static electric field perpendicular to said substrate surface at said first predetermined depth.
Claim 18
Dependent Claim
46 words
The field effect transistor of claim 1 wherein said tub region extends a predetermined depth from said substrate surface, at least said predetermined depth being selected to produce a threshold voltage for said field effect transistor which is twice the Fermi potential of said semiconductor substrate.
Claim 19
Dependent Claim
83 words
The field effect transistor of claim 1 wherein said tub region extends a predetermined depth from said substrate surface, at least said predetermined depth being selected to allow carriers of said second conductivity type to flow from said source region to said drain region in said tub region, extending from a second predetermined depth between said predetermined depth and said substrate surface towards said substrate surface, upon application of voltage to said gate electrode beyond the threshold voltage of said field effect transistor.
Claim 20
Dependent Claim
62 words
The field effect transistor of claim 1 wherein said tub region extends a predetermined depth from said substrate surface, at least said predetermined depth being selected to allow carriers of said second conductivity type to flow within said tub region, from said source region to said drain region and beneath said substrate surface, without creating an inversion layer in said tub region.
Claim 21
Dependent Claim
72 words
The field effect transistor of claim 1 wherein said tub region extends a predetermined depth from said substrate surface, at least said predetermined depth being selected to produce a first gate capacitance upon biasing said gate electrode from below the threshold voltage of said field effect transistor to said threshold voltage, and to produce a second gate capacitance upon biasing said gate electrode from above said threshold voltage to said threshold voltage.
Claim 22
Dependent Claim
102 words
The field effect transistor of claim 1 further comprising a substrate contact for electrically contacting said substrate; wherein said tub region extends a predetermined depth from said substrate surface, wherein said gate electrode includes a polysilicon layer of said first conductivity type and a conductive electrode on said polysilicon layer opposite said gate insulating layer; at least said predetermined depth being selected to produce a voltage at said substrate surface, adjacent said gate insulating layer, which is equal and opposite to the sum of the voltage between said substrate contact and said substrate and between said polysilicon layer and said conductive electrode.
Claim 23
Dependent Claim
67 words
The field effect transistor of claim 1 wherein said gate insulating layer is of predetermined thickness, and wherein said tub region extends a predetermined depth from said substrate surface, at least said predetermined depth being selected to produce a threshold voltage for said field effect transistor which is independent of said predetermined thickness, and current for said field effect transistor which increases inversely to said predetermined thickness.
Claim 24
Dependent Claim
135 words
A field effect transistor comprising: a semiconductor substrate of first conductivity type: a tub region of second conductivity type in said substrate at a surface thereof; spaced apart source injector tub and drain injector tub regions of said second conductivity type in said tub region at said substrate surface; a source region of said second conductivity type at least partially within said source injector tub region; a drain region of said second conductivity type at least partially within said drain injector tub region; a gate insulating layer on said substrate at said substrate surface, between said source and drain regions; source, drain and gate electrodes contacting said source and drain regions and said gate insulating layer, respectively; and a substrate contact region of said first conductivity type in said tub region at said substrate surface.
Claim 25
Dependent Claim
135 words
A field effect transistor comprising: a semiconductor substrate of first conductivity type: a tub region of second conductivity type in said substrate at a surface thereof; spaced apart source injector tub and drain injector tub regions of said second conductivity type in said tub region at said substrate surface; a source region of said second conductivity type at least partially within said source injector tub region; a drain region of said second conductivity type at least partially within said drain injector tub region; a gate insulating layer on said substrate at said substrate surface, between said source and drain regions; source, drain and gate electrodes contacting said source and drain regions and said gate insulating layer, respectively; and a substrate contact region of said first conductivity type in said tub region at said substrate surface.
Claim 26
Dependent Claim
73 words
The field effect transistor of claim 23 wherein said tub region is doped said second conductivity type at a relatively low doping concentration, wherein said source and drain regions are doped said second conductivity type at a relatively high doping concentration, and wherein said source and drain injector tub regions are doped said second conductivity type at an intermediate doping concentration between that of said tub region and said source and drain regions.
Claim 27
Dependent Claim
45 words
The field effect transistor of claim 23 further comprising at least one gate sidewall spacer on said substrate surface, extending from adjacent said source injector tub region to adjacent said gate electrode, and from adjacent said drain injector tub region to adjacent said gate electrode.
Claim 28
Dependent Claim
31 words
The field effect transistor of claim 25 wherein said at least one gate sidewall spacer comprises an insulator having permittivity which is greater than the permittivity of said gate insulating layer.
Claim 29
Dependent Claim
27 words
The field effect transistor of claim 26 wherein said gate insulating layer comprises silicon dioxide and wherein said at least one gate sidewall spacer comprises silicon nitride.
Claim 30
Dependent Claim
83 words
The field effect transistor of claim 25 wherein said gate electrode includes a polysilicon gate electrode layer of said first conductivity type on said gate insulating layer opposite said substrate surface, said polysilicon gate electrode layer including at least one polysilicon sidewall, and wherein said at least one gate sidewall spacer extends from adjacent said source injector tub region to adjacent said at least one polysilicon sidewall, and from adjacent said drain injector tub region to adjacent said at least one polysilicon sidewall.
Claim 31
Dependent Claim
31 words
The field effect transistor of claim 28 wherein said at least one gate sidewall spacer comprises an insulator having permittivity which is greater than the permittivity of said gate insulating layer.
Claim 32
Dependent Claim
27 words
The field effect transistor of claim 29 wherein said gate insulating layer comprises silicon dioxide and wherein said at least one gate sidewall spacer comprises silicon nitride.
Claim 33
Dependent Claim
101 words
The field effect transistor of claim 25 said source injector tub region extends to said substrate surface, wherein said gate insulating layer extends onto said source injector tub region at said substrate surface, wherein said at least one gate sidewall spacer also extends onto said source injector tub region at said substrate surface, wherein said drain injector tub region extends to said substrate surface, wherein said gate insulating layer extends onto said drain injector tub region at said substrate surface, and wherein said at least one gate sidewall spacer also extends onto said drain injector tub region at said substrate surface.
Claim 34
Dependent Claim
31 words
The field effect transistor of claim 31 wherein said at least one gate sidewall spacer comprises an insulator having permittivity which is greater than the permittivity of said gate insulating layer.
Claim 35
Dependent Claim
27 words
The field effect transistor of claim 32 wherein said gate insulating layer comprises silicon dioxide and wherein said at least one gate sidewall spacer comprises silicon nitride.
Claim 36
Dependent Claim
42 words
The field effect transistor of claim 23 wherein said source region includes a source sidewall and a source bottom, wherein said source sidewall is within said source injector tub region and wherein said source bottom extends outside said source injector tub region.
Claim 37
Dependent Claim
81 words
The field effect transistor of claim 23 wherein said tub region extends into said substrate a first predetermined depth from said substrate surface, said field effect transistor further comprising a bottom leakage controlling region of said first conductivity type in said substrate, extending across said substrate between extensions of said source and drain regions, and extending into said substrate from a second depth which is less than said first depth, to a third depth which is greater than said first depth.
Claim 38
Dependent Claim
41 words
The field effect transistor of claim 35 wherein said substrate is doped said first conductivity type at a relatively low doping concentration and wherein said bottom leakage control region is doped said first conductivity type at a relatively high doping concentration.
Claim 39
Dependent Claim
76 words
The field effect transistor of claim 23 wherein said tub region extends into said substrate a first predetermined depth from said substrate surface; wherein said source region and said drain region extend into said substrate a second predetermined depth from said substrate surface; and wherein said source injector tub region and said drain injector tub region extend into said substrate a third predetermined depth which is between said second predetermined depth and said first predetermined depth.
Claim 40
Dependent Claim
44 words
The field effect transistor of claim 23 wherein said tub region extends into said substrate a predetermined depth from said substrate surface and wherein said source injector tub region and said drain injector tub region also extend into said substrate to said predetermined depth.
Claim 41
Dependent Claim
84 words
The field effect transistor of claim 23 further comprising a channel of said second conductivity type in said tub region at said substrate surface, between said spaced apart source and drain regions; wherein said channel extends a first predetermined depth from said substrate surface and said tub region extends a second predetermined depth from said channel, at least one of said first and second predetermined depths being selected to produce zero static electric field perpendicular to said substrate surface at said first predetermined depth.
Claim 42
Dependent Claim
46 words
The field effect transistor of claim 23 wherein said tub region extends a predetermined depth from said substrate surface, at least said predetermined depth being selected to produce a threshold voltage for said field effect transistor which is twice the Fermi potential of said semiconductor substrate.
Claim 43
Dependent Claim
83 words
The field effect transistor of claim 23 wherein said tub region extends a predetermined depth from said substrate surface, at least said predetermined depth being selected to allow carriers of said second conductivity type to flow from said source region to said drain region in said tub region, extending from a second predetermined depth between said predetermined depth and said substrate surface towards said first surface, upon application of voltage to said gate electrode beyond the threshold voltage of said field effect transistor.
Claim 44
Dependent Claim
62 words
The field effect transistor of claim 23 wherein said tub region extends a predetermined depth from said substrate surface, at least said predetermined depth being selected to allow carriers of said second conductivity type to flow within said tub region, from said source region to said drain region and beneath said substrate surface, without creating an inversion layer in said tub region.
Claim 45
Dependent Claim
72 words
The field effect transistor of claim 23 wherein said tub region extends a predetermined depth from said substrate surface, at least said predetermined depth being selected to produce a first gate capacitance upon biasing said gate electrode from below the threshold voltage of said field effect transistor to said threshold voltage, and to produce a second gate capacitance upon biasing said gate electrode from above said threshold voltage to said threshold voltage.
Claim 46
Dependent Claim
102 words
The field effect transistor of claim 23 further comprising a substrate contact for electrically contacting said substrate; wherein said tub region extends a predetermined depth from said substrate surface, wherein said gate electrode includes a polysilicon layer of said first conductivity type and a conductive electrode on said polysilicon layer opposite said gate insulating layer; at least said predetermined depth being selected to produce a voltage at said substrate surface, adjacent said gate insulating layer, which is equal and opposite to the sum of the voltage between said substrate contact and said substrate and between said polysilicon layer and said conductive electrode.
Claim 47
Dependent Claim
67 words
The field effect transistor of claim 23 wherein said gate insulating layer is of predetermined thickness, and wherein said tub region extends a predetermined depth from said substrate surface, at least said predetermined depth being selected to produce a threshold voltage for said field effect transistor which is independent of said predetermined thickness, and current for said field effect transistor which increases inversely to said predetermined thickness.
Claim 48
Dependent Claim
161 words
A field effect transistor comprising: a semiconductor substrate of first conductivity type; a tub region of second conductivity type in said substrate; spaced apart source and drain regions of said second conductivity type in said tub region; a channel of said second conductivity type, in said tub region, between said spaced apart source and drain regions; means for enhancing injection of carriers from said source region into said channel, at a predetermined depth in said channel; a gate insulating layer on said substrate adjacent said channel, between said spaced apart source and drain regions; and source, drain and gate electrodes contacting said source and drain regions and said gate insulating layer, respectively, wherein said channel is of a first predetermined depth and said tub region is of a second predetermined depth, at least one of said first and second predetermined depths being selected to produce zero static electric field at the interface of said channel and said tub region, perpendicular thereto.
Claim 49
Dependent Claim
161 words
A field effect transistor comprising: a semiconductor substrate of first conductivity type; a tub region of second conductivity type in said substrate; spaced apart source and drain regions of said second conductivity type in said tub region; a channel of said second conductivity type, in said tub region, between said spaced apart source and drain regions; means for enhancing injection of carriers from said source region into said channel, at a predetermined depth in said channel; a gate insulating layer on said substrate adjacent said channel, between said spaced apart source and drain regions; and source, drain and gate electrodes contacting said source and drain regions and said gate insulating layer, respectively, wherein said channel is of a first predetermined depth and said tub region is of a second predetermined depth, at least one of said first and second predetermined depths being selected to produce zero static electric field at the interface of said channel and said tub region, perpendicular thereto.
Claim 50
Dependent Claim
31 words
The field effect transistor of claim 46 wherein said injection enhancing means comprises a source injector region of said second conductivity type, adjacent said source region and facing said drain region.
Claim 51
Dependent Claim
42 words
The field effect transistor of claim 47 wherein said source region is of a third predetermined depth; and wherein said source injector region is of a fourth predetermined depth which is between said third predetermined depth and said second first predetermined depth.
Claim 52
Dependent Claim
19 words
The field effect transistor of claim 47 wherein said source injector region is also of said second predetermined depth.
Claim 53
Dependent Claim
38 words
The field effect transistor of claim 46 further comprising a bottom leakage controlling region of said first conductivity type in said substrate, extending between extensions of said source and drain regions, and extending partially into said tub region.
Claim 54
Dependent Claim
36 words
The field effect transistor of claim 46 wherein at least said second predetermined depth being selected to produce a threshold voltage for said field effect transistor which is twice the Fermi potential of said semiconductor substrate.
Claim 55
Dependent Claim
200 words
A field effect transistor comprising: a semiconductor substrate of first conductivity type; a tub region of second conductivity type in said substrate at a surface thereof, and extending into said substrate a first predetermined depth from said substrate surface; spaced apart source and drain regions of said second conductivity type in said tub region at said substrate surface; a channel of said second conductivity type, in said tub region, between said spaced apart source and drain regions, and forming an interface with said tub region, at least said first predetermined depth being selected to produce zero static electric field at the interface of said channel and said tub region, perpendicular thereto; a bottom leakage controlling region of said first conductivity type in said substrate, extending across said substrate between extensions of said source and drain regions and extending into said substrate from a third depth which is less than said first depth to a fourth depth which is greater than said first depth; a gate insulating layer on said substrate at said substrate surface, between said spaced apart source and drain regions; and source, drain and gate electrodes contacting said source and drain regions and said gate insulating layer, respectively.
Claim 56
Dependent Claim
200 words
A field effect transistor comprising: a semiconductor substrate of first conductivity type; a tub region of second conductivity type in said substrate at a surface thereof, and extending into said substrate a first predetermined depth from said substrate surface; spaced apart source and drain regions of said second conductivity type in said tub region at said substrate surface; a channel of said second conductivity type, in said tub region, between said spaced apart source and drain regions, and forming an interface with said tub region, at least said first predetermined depth being selected to produce zero static electric field at the interface of said channel and said tub region, perpendicular thereto; a bottom leakage controlling region of said first conductivity type in said substrate, extending across said substrate between extensions of said source and drain regions and extending into said substrate from a third depth which is less than said first depth to a fourth depth which is greater than said first depth; a gate insulating layer on said substrate at said substrate surface, between said spaced apart source and drain regions; and source, drain and gate electrodes contacting said source and drain regions and said gate insulating layer, respectively.
Claim 57
Dependent Claim
41 words
The field effect transistor of claim 52 wherein said substrate is doped said first conductivity type at a relatively low doping concentration and wherein said bottom leakage control region is doped said first conductivity type at a relatively high doping concentration.
Claim 58
Dependent Claim
36 words
The field effect transistor of claim 52 wherein at least said first predetermined depth is selected to produce a threshold voltage for said field effect transistor which is twice the Fermi potential of said semiconductor substrate.
Claim 59
Dependent Claim
175 words
A field effect transistor comprising: a semiconductor substrate of first conductivity type; a tub region of second conductivity type in said substrate at a surface thereof; spaced apart source and drain regions of said second conductivity type in said tub region at said substrate surface; a source injector region of said second conductivity type, adjacent said source region and facing said drain region; a channel of said second conductivity type in said tub region at said substrate surface, between said spaced apart source and drain regions, wherein said channel extends a first predetermined depth from said substrate surface and said tub region extends a second predetermined depth from said channel, at least one of said first and second predetermined depths being selected to produce zero static electric field perpendicular to said substrate surface at said first predetermined depth; a gate insulating layer on said substrate at said substrate surface, between said spaced apart source and drain regions; and source, drain and gate electrodes contacting said source and drain regions and said gate insulating layer, respectively.
Claim 60
Dependent Claim
175 words
A field effect transistor comprising: a semiconductor substrate of first conductivity type; a tub region of second conductivity type in said substrate at a surface thereof; spaced apart source and drain regions of said second conductivity type in said tub region at said substrate surface; a source injector region of said second conductivity type, adjacent said source region and facing said drain region; a channel of said second conductivity type in said tub region at said substrate surface, between said spaced apart source and drain regions, wherein said channel extends a first predetermined depth from said substrate surface and said tub region extends a second predetermined depth from said channel, at least one of said first and second predetermined depths being selected to produce zero static electric field perpendicular to said substrate surface at said first predetermined depth; a gate insulating layer on said substrate at said substrate surface, between said spaced apart source and drain regions; and source, drain and gate electrodes contacting said source and drain regions and said gate insulating layer, respectively.
Claim 61
Dependent Claim
66 words
The field effect transistor of claim 55 wherein said tub region is doped said second conductivity type at a relatively low doping concentration, wherein said source region is doped said second conductivity type at a relatively high doping concentration, and wherein said source injector region is doped said second conductivity type at an intermediate doping concentration between that of said tub region and said source region.
Claim 62
Dependent Claim
29 words
The field effect transistor of claim 55 further comprising a gate sidewall spacer on said substrate surface, extending from adjacent said source injector region to adjacent said gate electrode.
Claim 63
Dependent Claim
28 words
The field effect transistor of claim 57 wherein said gate sidewall spacer comprises an insulator having permittivity which is greater than the permittivity of said gate insulating layer.
Claim 64
Dependent Claim
24 words
The field effect transistor of claim 58 wherein said gate insulating layer comprises silicon dioxide and wherein said gate sidewall spacer comprises silicon nitride.
Claim 65
Dependent Claim
58 words
The field effect transistor of claim 57 wherein said gate electrode includes a polysilicon gate electrode layer of said first conductivity type on said gate insulating layer opposite said substrate surface, said polysilicon gate electrode layer including a polysilicon sidewall, and wherein said gate sidewall spacer extends from adjacent said source injector region to adjacent said polysilicon sidewall.
Claim 66
Dependent Claim
28 words
The field effect transistor of claim 60 wherein said gate sidewall spacer comprises an insulator having permittivity which is greater than the permittivity of said gate insulating layer.
Claim 67
Dependent Claim
24 words
The field effect transistor of claim 61 wherein said gate insulating layer comprises silicon dioxide and wherein said gate sidewall spacer comprises silicon nitride.
Claim 68
Dependent Claim
49 words
The field effect transistor of claim 57 wherein said source injector region extends to said substrate surface, wherein said gate insulating layer extends onto said source injector region at said substrate surface, and wherein said gate sidewall spacer also extends onto said source injector region at said substrate surface.
Claim 69
Dependent Claim
28 words
The field effect transistor of claim 63 wherein said gate sidewall spacer comprises an insulator having permittivity which is greater than the permittivity of said gate insulating layer.
Claim 70
Dependent Claim
24 words
The field effect transistor of claim 64 wherein said gate insulating layer comprises silicon dioxide and wherein said gate sidewall spacer comprises silicon nitride.
Claim 71
Dependent Claim
81 words
The field effect transistor of claim 55 wherein said tub region extends into said substrate a third predetermined depth from said substrate surface, said field effect transistor further comprising a bottom leakage controlling region of said first conductivity type in said substrate, extending across said substrate between extensions of said source and drain regions, and extending into said substrate from a fourth depth which is less than said third depth, to a fifth depth which is greater than said first depth.
Claim 72
Dependent Claim
41 words
The field effect transistor of claim 66 wherein said substrate is doped said first conductivity type at a relatively low doping concentration and wherein said bottom leakage control region is doped said first conductivity type at a relatively high doping concentration.
Claim 73
Dependent Claim
26 words
The field effect transistor of claim 55 further comprising a substrate contact region of said first conductivity type in said tub region at said substrate surface.
Claim 74
Dependent Claim
65 words
The field effect transistor of claim 55 wherein said tub region extends into said substrate a third predetermined depth from said substrate surface; wherein said source region extends into said substrate a fourth predetermined depth from said substrate surface; and wherein said source injector region extends into said substrate a fifth predetermined depth which is between said fourth predetermined depth and said third predetermined depth.
Claim 75
Dependent Claim
38 words
The field effect transistor of claim 55 wherein said tub extends into said substrate a third predetermined depth from said substrate surface and wherein said source injector region also extends into said substrate to said third predetermined depth.
Claim 76
Dependent Claim
48 words
The field effect transistor of claim 55 wherein said tub region extends a third predetermined depth from said substrate surface, at least said third predetermined depth being selected to produce a threshold voltage for said field effect transistor which is twice the Fermi potential of said semiconductor substrate.
Claim 77
Dependent Claim
86 words
The field effect transistor of claim 55 wherein said tub region extends a third predetermined depth from said substrate surface, at least said third predetermined depth being selected to allow carriers of said second conductivity type to flow from said source region to said drain region in said tub region, extending from a fourth predetermined depth between said third predetermined depth and said substrate surface towards said substrate surface, upon application of voltage to said gate electrode beyond the threshold voltage of said field effect transistor.
Claim 78
Dependent Claim
64 words
The field effect transistor of claim 55 wherein said tub region extends a third predetermined depth from said substrate surface, at least said third predetermined depth being selected to allow carriers of said second conductivity type to flow within said tub region, from said source region to said drain region and beneath said substrate surface, without creating an inversion layer in said tub region.
Claim 79
Dependent Claim
74 words
The field effect transistor of claim 55 wherein said tub region extends a third predetermined depth from said substrate surface, at least said third predetermined depth being selected to produce a first gate capacitance upon biasing said gate electrode from below the threshold voltage of said field effect transistor to said threshold voltage, and to produce a second gate capacitance upon biasing said gate electrode from above said threshold voltage to said threshold voltage.
Claim 80
Dependent Claim
104 words
The field effect transistor of claim 55 further comprising a substrate contact for electrically contacting said substrate; wherein said tub region extends a third predetermined depth from said substrate surface, wherein said gate electrode includes a polysilicon layer of said first conductivity type and a conductive electrode on said polysilicon layer opposite said gate insulating layer; at least said third predetermined depth being selected to produce a voltage at said substrate surface, adjacent said gate insulating layer, which is equal and opposite to the sum of the voltage between said substrate contact and said substrate and between said polysilicon layer and said conductive electrode.
Claim 81
Dependent Claim
69 words
The field effect transistor of claim 55 wherein said gate insulating layer is of predetermined thickness, and wherein said tub region extends a third predetermined depth from said substrate surface, at least said third predetermined depth being selected to produce a threshold voltage for said field effect transistor which is independent of said predetermined thickness, and current for said field effect transistor which increases inversely to said predetermined thickness.
Claim 82
Dependent Claim
193 words
A field effect transistor comprising: a semiconductor substrate of first conductivity type: a tub region of second conductivity type in said substrate at a surface thereof; spaced apart source injector tub and drain injector tub regions of said second conductivity type in said tub region at said substrate surface; a source region of said second conductivity type at least partially within said source injector tub region; a drain region of said second conductivity type at least partially within said drain injector tub region; a channel of said second conductivity type in said tub region at said substrate surface, between said spaced apart source and drain regions, wherein said channel extends a first predetermined depth from said substrate surface and said tub region extends a second predetermined depth from said channel, at least one of said first and second predetermined depths being selected to produce zero static electric field perpendicular to said substrate surface at said first predetermined depth; a gate insulating layer on said substrate at said substrate surface, between said source and drain regions; and source, drain and gate electrodes contacting said source and drain regions and said gate insulating layer, respectively.
Claim 83
Dependent Claim
193 words
A field effect transistor comprising: a semiconductor substrate of first conductivity type: a tub region of second conductivity type in said substrate at a surface thereof; spaced apart source injector tub and drain injector tub regions of said second conductivity type in said tub region at said substrate surface; a source region of said second conductivity type at least partially within said source injector tub region; a drain region of said second conductivity type at least partially within said drain injector tub region; a channel of said second conductivity type in said tub region at said substrate surface, between said spaced apart source and drain regions, wherein said channel extends a first predetermined depth from said substrate surface and said tub region extends a second predetermined depth from said channel, at least one of said first and second predetermined depths being selected to produce zero static electric field perpendicular to said substrate surface at said first predetermined depth; a gate insulating layer on said substrate at said substrate surface, between said source and drain regions; and source, drain and gate electrodes contacting said source and drain regions and said gate insulating layer, respectively.
Claim 84
Dependent Claim
73 words
The field effect transistor of claim 77 wherein said tub region is doped said second conductivity type at a relatively low doping concentration, wherein said source and drain regions are doped said second conductivity type at a relatively high doping concentration, and wherein said source and drain injector tub regions are doped said second conductivity type at an intermediate doping concentration between that of said tub region and said source and drain regions.
Claim 85
Dependent Claim
45 words
The field effect transistor of claim 77 further comprising at least one gate sidewall spacer on said substrate surface, extending from adjacent said source injector tub region to adjacent said gate electrode, and from adjacent said drain injector tub region to adjacent said gate electrode.
Claim 86
Dependent Claim
31 words
The field effect transistor of claim 79 wherein said at least one gate sidewall spacer comprises an insulator having permittivity which is greater than the permittivity of said gate insulating layer.
Claim 87
Dependent Claim
27 words
The field effect transistor of claim 80 wherein said gate insulating layer comprises silicon dioxide and wherein said at least one gate sidewall spacer comprises silicon nitride.
Claim 88
Dependent Claim
83 words
The field effect transistor of claim 79 wherein said gate electrode includes a polysilicon gate electrode layer of said first conductivity type on said gate insulating layer opposite said substrate surface, said polysilicon gate electrode layer including at least one polysilicon sidewall, and wherein said at least one gate sidewall spacer extends from adjacent said source injector tub region to adjacent said at least one polysilicon sidewall, and from adjacent said drain injector tub region to adjacent said at least one polysilicon sidewall.
Claim 89
Dependent Claim
31 words
The field effect transistor of claim 82 wherein said at least one gate sidewall spacer comprises an insulator having permittivity which is greater than the permittivity of said gate insulating layer.
Claim 90
Dependent Claim
27 words
The field effect transistor of claim 83 wherein said gate insulating layer comprises silicon dioxide and wherein said at least one gate sidewall spacer comprises silicon nitride.
Claim 91
Dependent Claim
101 words
The field effect transistor of claim 79 said source injector tub region extends to said substrate surface, wherein said gate insulating layer extends onto said source injector tub region at said substrate surface, wherein said at least one gate sidewall spacer also extends onto said source injector tub region at said substrate surface, wherein said drain injector tub region extends to said substrate surface, wherein said gate insulating layer extends onto said drain injector tub region at said substrate surface, and wherein said at least one gate sidewall spacer also extends onto said drain injector tub region at said substrate surface.
Claim 92
Dependent Claim
31 words
The field effect transistor of claim 85 wherein said at least one gate sidewall spacer comprises an insulator having permittivity which is greater than the permittivity of said gate insulating layer.
Claim 93
Dependent Claim
27 words
The field effect transistor of claim 86 wherein said gate insulating layer comprises silicon dioxide and wherein said at least one gate sidewall spacer comprises silicon nitride.
Claim 94
Dependent Claim
42 words
The field effect transistor of claim 77 wherein said source region includes a source sidewall and a source bottom, wherein said source sidewall is within said source injector tub region and wherein said source bottom extends outside said source injector tub region.
Claim 95
Dependent Claim
81 words
The field effect transistor of claim 77 wherein said tub region extends into said substrate a third predetermined depth from said substrate surface, said field effect transistor further comprising a bottom leakage controlling region of said first conductivity type in said substrate, extending across said substrate between extensions of said source and drain regions, and extending into said substrate from a fourth depth which is less than said first depth, to a fifth depth which is greater than said first depth.
Claim 96
Dependent Claim
41 words
The field effect transistor of claim 89 wherein said substrate is doped said first conductivity type at a relatively low doping concentration and wherein said bottom leakage control region is doped said first conductivity type at a relatively high doping concentration.
Claim 97
Dependent Claim
26 words
The field effect transistor of claim 77 further comprising a substrate contact region of said first conductivity type in said tub region at said substrate surface.
Claim 98
Dependent Claim
76 words
The field effect transistor of claim 77 wherein said tub region extends into said substrate a third predetermined depth from said substrate surface; wherein said source region and said drain region extend into said substrate a fourth predetermined depth from said substrate surface; and wherein said source injector tub region and said drain injector tub region extend into said substrate a fifth predetermined depth which is between said fourth predetermined depth and said third predetermined depth.
Claim 99
Dependent Claim
46 words
The field effect transistor of claim 77 wherein said tub region extends into said substrate a third predetermined depth from said substrate surface and wherein said source injector tub region and said drain injector tub region also extend into said substrate to said third predetermined depth.
Claim 100
Dependent Claim
48 words
The field effect transistor of claim 77 wherein said tub region extends a third predetermined depth from said substrate surface, at least said third predetermined depth being selected to produce a threshold voltage for said field effect transistor which is twice the Fermi potential of said semiconductor substrate.
Claim 101
Dependent Claim
86 words
The field effect transistor of claim 77 wherein said tub region extends a third predetermined depth from said substrate surface, at least said third predetermined depth being selected to allow carriers of said second conductivity type to flow from said source region to said drain region in said tub region, extending from a fourth predetermined depth between said third predetermined depth and said substrate surface towards said first surface, upon application of voltage to said gate electrode beyond the threshold voltage of said field effect transistor.
Claim 102
Dependent Claim
64 words
The field effect transistor of claim 77 wherein said tub region extends a third predetermined depth from said substrate surface, at least said third predetermined depth being selected to allow carriers of said second conductivity type to flow within said tub region, from said source region to said drain region and beneath said substrate surface, without creating an inversion layer in said tub region.
Claim 103
Dependent Claim
74 words
The field effect transistor of claim 77 wherein said tub region extends a third predetermined depth from said substrate surface, at least said third predetermined depth being selected to produce a first gate capacitance upon biasing said gate electrode from below the threshold voltage of said field effect transistor to said threshold voltage, and to produce a second gate capacitance upon biasing said gate electrode from above said threshold voltage to said threshold voltage.
Claim 104
Dependent Claim
104 words
The field effect transistor of claim 77 further comprising a substrate contact for electrically contacting said substrate; wherein said tub region extends a third predetermined depth from said substrate surface, wherein said gate electrode includes a polysilicon layer of said first conductivity type and a conductive electrode on said polysilicon layer opposite said gate insulating layer; at least said third predetermined depth being selected to produce a voltage at said substrate surface, adjacent said gate insulating layer, which is equal and opposite to the sum of the voltage between said substrate contact and said substrate and between said polysilicon layer and said conductive electrode.
Claim 105
Dependent Claim
69 words
The field effect transistor of claim 77 wherein said gate insulating layer is of predetermined thickness, and wherein said tub region extends a third predetermined depth from said substrate surface, at least said third predetermined depth being selected to produce a threshold voltage for said field effect transistor which is independent of said predetermined thickness, and current for said field effect transistor which increases inversely to said predetermined thickness.
Claim 106
Dependent Claim
176 words
A field effect transistor comprising: a semiconductor substrate of first conductivity type; a tub region of second conductivity type in said substrate at a surface thereof; spaced apart source and drain regions of said second conductivity type in said tub region at said substrate surface; a source injector region of said second conductivity type, adjacent said source region and facing said drain region; wherein said tub region extends a predetermined depth from said substrate surface, at least said predetermined depth being selected to allow carriers of said second conductivity type to flow from said source region to said drain region in said tub region, extending from a second predetermined depth between said predetermined depth and said substrate surface towards said substrate surface, upon application of voltage to said gate electrode beyond the threshold voltage of said field effect transistor; a gate insulating layer on said substrate at said substrate surface, between said spaced apart source and drain regions; and source, drain and gate electrodes contacting said source and drain regions and said gate insulating layer, respectively.
Claim 107
Dependent Claim
176 words
A field effect transistor comprising: a semiconductor substrate of first conductivity type; a tub region of second conductivity type in said substrate at a surface thereof; spaced apart source and drain regions of said second conductivity type in said tub region at said substrate surface; a source injector region of said second conductivity type, adjacent said source region and facing said drain region; wherein said tub region extends a predetermined depth from said substrate surface, at least said predetermined depth being selected to allow carriers of said second conductivity type to flow from said source region to said drain region in said tub region, extending from a second predetermined depth between said predetermined depth and said substrate surface towards said substrate surface, upon application of voltage to said gate electrode beyond the threshold voltage of said field effect transistor; a gate insulating layer on said substrate at said substrate surface, between said spaced apart source and drain regions; and source, drain and gate electrodes contacting said source and drain regions and said gate insulating layer, respectively.
Claim 108
Dependent Claim
66 words
The field effect transistor of claim 100 wherein said tub region is doped said second conductivity type at a relatively low doping concentration, wherein said source region is doped said second conductivity type at a relatively high doping concentration, and wherein said source injector region is doped said second conductivity type at an intermediate doping concentration between that of said tub region and said source region.
Claim 109
Dependent Claim
29 words
The field effect transistor of claim 100 further comprising a gate sidewall spacer on said substrate surface, extending from adjacent said source injector region to adjacent said gate electrode.
Claim 110
Dependent Claim
28 words
The field effect transistor of claim 102 wherein said gate sidewall spacer comprises an insulator having permittivity which is greater than the permittivity of said gate insulating layer.
Claim 111
Dependent Claim
24 words
The field effect transistor of claim 103 wherein said gate insulating layer comprises silicon dioxide and wherein said gate sidewall spacer comprises silicon nitride.
Claim 112
Dependent Claim
58 words
The field effect transistor of claim 102 wherein said gate electrode includes a polysilicon gate electrode layer of said first conductivity type on said gate insulating layer opposite said substrate surface, said polysilicon gate electrode layer including a polysilicon sidewall, and wherein said gate sidewall spacer extends from adjacent said source injector region to adjacent said polysilicon sidewall.
Claim 113
Dependent Claim
28 words
The field effect transistor of claim 105 wherein said gate sidewall spacer comprises an insulator having permittivity which is greater than the permittivity of said gate insulating layer.
Claim 114
Dependent Claim
24 words
The field effect transistor of claim 106 wherein said gate insulating layer comprises silicon dioxide and wherein said gate sidewall spacer comprises silicon nitride.
Claim 115
Dependent Claim
49 words
The field effect transistor of claim 102 wherein said source injector region extends to said substrate surface, wherein said gate insulating layer extends onto said source injector region at said substrate surface, and wherein said gate sidewall spacer also extends onto said source injector region at said substrate surface.
Claim 116
Dependent Claim
28 words
The field effect transistor of claim 108 wherein said gate sidewall spacer comprises an insulator having permittivity which is greater than the permittivity of said gate insulating layer.
Claim 117
Dependent Claim
24 words
The field effect transistor of claim 109 wherein said gate insulating layer comprises silicon dioxide and wherein said gate sidewall spacer comprises silicon nitride.
Claim 118
Dependent Claim
61 words
The field effect transistor of claim 100 further comprising a bottom leakage controlling region of said first conductivity type in said substrate, extending across said substrate between extensions of said source and drain regions, and extending into said substrate from a third depth which is less than said predetermined depth, to a fourth depth which is greater than said predetermined depth.
Claim 119
Dependent Claim
41 words
The field effect transistor of claim 111 wherein said substrate is doped said first conductivity type at a relatively low doping concentration and wherein said bottom leakage control region is doped said first conductivity type at a relatively high doping concentration.
Claim 120
Dependent Claim
26 words
The field effect transistor of claim 100 further comprising a substrate contact region of said first conductivity type in said tub region at said substrate surface.
Claim 121
Dependent Claim
48 words
The field effect transistor of claim 100 wherein said source region extends into said substrate a third predetermined depth from said substrate surface; and wherein said source injector region extends into said substrate a fourth predetermined depth which is between said third predetermined depth and said predetermined depth.
Claim 122
Dependent Claim
21 words
The field effect transistor of claim 100 wherein said source injector region also extends into said substrate to said predetermined depth.
Claim 123
Dependent Claim
84 words
The field effect transistor of claim 100 further comprising a channel of said second conductivity type in said tub region at said substrate surface, between said spaced apart source and drain regions; wherein said channel extends said second predetermined depth from said substrate surface and said tub region extends a third predetermined depth from said channel, at least one of said second and third predetermined depths being selected to produce zero static electric field perpendicular to said substrate surface at said second predetermined depth.
Claim 124
Dependent Claim
36 words
The field effect transistor of claim 100 wherein at least said predetermined depth is further selected to produce a threshold voltage for said field effect transistor which is twice the Fermi potential of said semiconductor substrate.
Claim 125
Dependent Claim
52 words
The field effect transistor of claim 100 wherein at least said predetermined depth is further selected to allow carriers of said second conductivity type to flow within said tub region, from said source region to said drain region and beneath said substrate surface, without creating an inversion layer in said tub region.
Claim 126
Dependent Claim
62 words
The field effect transistor of claim 100 wherein at least said predetermined depth is further selected to produce a first gate capacitance upon biasing said gate electrode from below the threshold voltage of said field effect transistor to said threshold voltage, and to produce a second gate capacitance upon biasing said gate electrode from above said threshold voltage to said threshold voltage.
Claim 127
Dependent Claim
91 words
The field effect transistor of claim 100 further comprising a substrate contact for electrically contacting said substrate; wherein said gate electrode includes a polysilicon layer of said first conductivity type and a conductive electrode on said polysilicon layer opposite said gate insulating layer; at least said predetermined depth being further selected to produce a voltage at said substrate surface, adjacent said gate insulating layer, which is equal and opposite to the sum of the voltage between said substrate contact and said substrate and between said polysilicon layer and said gate electrode.
Claim 128
Dependent Claim
57 words
The field effect transistor of claim 100 wherein said gate insulating layer is of predetermined thickness, and wherein at least said predetermined depth is further selected to produce a threshold voltage for said field effect transistor which is independent of said predetermined thickness, and current for said field effect transistor which increases inversely to said predetermined thickness.
Claim 129
Dependent Claim
196 words
A field effect transistor comprising: a semiconductor substrate of first conductivity type: a tub region of second conductivity type in said substrate at a surface thereof; spaced apart source injector tub and drain injector tub regions of said second conductivity type in said tub region at said substrate surface; a source region of said second conductivity type at least partially within said source injector tub region; a drain region of said second conductivity type at least partially within said drain injector tub region; wherein said tub region extends a predetermined depth from said substrate surface, at least said predetermined depth being selected to allow carriers of said second conductivity type to flow from said source region to said drain region in said tub region, extending from a second predetermined depth between said predetermined depth and said substrate surface towards said first surface, upon application of voltage to said gate electrode beyond the threshold voltage of said field effect transistor; a gate insulating layer on said substrate at said substrate surface, between said spaced apart source and drain regions; and source, drain and gate electrodes contacting said source and drain regions and said gate insulating layer, respectively.
Claim 130
Dependent Claim
196 words
A field effect transistor comprising: a semiconductor substrate of first conductivity type: a tub region of second conductivity type in said substrate at a surface thereof; spaced apart source injector tub and drain injector tub regions of said second conductivity type in said tub region at said substrate surface; a source region of said second conductivity type at least partially within said source injector tub region; a drain region of said second conductivity type at least partially within said drain injector tub region; wherein said tub region extends a predetermined depth from said substrate surface, at least said predetermined depth being selected to allow carriers of said second conductivity type to flow from said source region to said drain region in said tub region, extending from a second predetermined depth between said predetermined depth and said substrate surface towards said first surface, upon application of voltage to said gate electrode beyond the threshold voltage of said field effect transistor; a gate insulating layer on said substrate at said substrate surface, between said spaced apart source and drain regions; and source, drain and gate electrodes contacting said source and drain regions and said gate insulating layer, respectively.
Claim 131
Dependent Claim
73 words
The field effect transistor of claim 122 wherein said tub region is doped said second conductivity type at a relatively low doping concentration, wherein said source and drain regions are doped said second conductivity type at a relatively high doping concentration, and wherein said source and drain injector tub regions are doped said second conductivity type at an intermediate doping concentration between that of said tub region and said source and drain regions.
Claim 132
Dependent Claim
45 words
The field effect transistor of claim 122 further comprising at least one gate sidewall spacer on said substrate surfacer extending from adjacent said source injector tub region to adjacent said gate electrode, and from adjacent said drain injector tub region to adjacent said gate electrode.
Claim 133
Dependent Claim
31 words
The field effect transistor of claim 124 wherein said at least one gate sidewall spacer comprises an insulator having permittivity which is greater than the permittivity of said gate insulating layer.
Claim 134
Dependent Claim
27 words
The field effect transistor of claim 125 wherein said gate insulating layer comprises silicon dioxide and wherein said at least one gate sidewall spacer comprises silicon nitride.
Claim 135
Dependent Claim
83 words
The field effect transistor of claim 124 wherein said gate electrode includes a polysilicon gate electrode layer of said first conductivity type on said gate insulating layer opposite said substrate surface, said polysilicon gate electrode layer including at least one polysilicon sidewall, and wherein said at least one gate sidewall spacer extends from adjacent said source injector tub region to adjacent said at least one polysilicon sidewall, and from adjacent said drain injector tub region to adjacent said at least one polysilicon sidewall.
Claim 136
Dependent Claim
31 words
The field effect transistor of claim 127 wherein said at least one gate sidewall spacer comprises an insulator having permittivity which is greater than the permittivity of said gate insulating layer.
Claim 137
Dependent Claim
27 words
The field effect transistor of claim 128 wherein said gate insulating layer comprises silicon dioxide and wherein said at least one gate sidewall spacer comprises silicon nitride.
Claim 138
Dependent Claim
101 words
The field effect transistor of claim 124 said source injector tub region extends to said substrate surface, wherein said gate insulating layer extends onto said source injector tub region at said substrate surface, wherein said at least one gate sidewall spacer also extends onto said source injector tub region at said substrate surface, wherein said drain injector tub region extends to said substrate surface, wherein said gate insulating layer extends onto said drain injector tub region at said substrate surface, and wherein said at least one gate sidewall spacer also extends onto said drain injector tub region at said substrate surface.
Claim 139
Dependent Claim
31 words
The field effect transistor of claim 130 wherein said at least one gate sidewall spacer comprises an insulator having permittivity which is greater than the permittivity of said gate insulating layer.
Claim 140
Dependent Claim
27 words
The field effect transistor of claim 131 wherein said gate insulating layer comprises silicon dioxide and wherein said at least one gate sidewall spacer comprises silicon nitride.
Claim 141
Dependent Claim
42 words
The field effect transistor of claim 122 wherein said source region includes a source sidewall and a source bottom, wherein said source sidewall is within said source injector tub region and wherein said source bottom extends outside said source injector tub region.
Claim 142
Dependent Claim
61 words
The field effect transistor of claim 122 further comprising a bottom leakage controlling region of said first conductivity type in said substrate, extending across said substrate between extensions of said source and drain regions, and extending into said substrate from a third depth which is less than said predetermined depth, to a fourth depth which is greater than said predetermined depth.
Claim 143
Dependent Claim
41 words
The field effect transistor of claim 134 wherein said substrate is doped said first conductivity type at a relatively low doping concentration and wherein said bottom leakage control region is doped said first conductivity type at a relatively high doping concentration.
Claim 144
Dependent Claim
26 words
The field effect transistor of claim 122 further comprising a substrate contact region of said first conductivity type in said tub region at said substrate surface.
Claim 145
Dependent Claim
59 words
The field effect transistor of claim 122 wherein said source region and said drain region extend into said substrate a third predetermined depth from said substrate surface; and wherein said source injector tub region and said drain injector tub region extend into said substrate a fourth predetermined depth which is between said third predetermined depth and said predetermined depth.
Claim 146
Dependent Claim
28 words
The field effect transistor of claim 122 wherein said source injector tub region and said drain injector tub region also extend into said substrate to said predetermined depth.
Claim 147
Dependent Claim
36 words
The field effect transistor of claim 122 wherein at least said predetermined depth is further selected to produce a threshold voltage for said field effect transistor which is twice the Fermi potential of said semiconductor substrate.
Claim 148
Dependent Claim
52 words
The field effect transistor of claim 122 wherein at least said predetermined depth is further selected to allow carriers of said second conductivity type to flow within said tub region, from said source region to said drain region and beneath said substrate surface, without creating an inversion layer in said tub region.
Claim 149
Dependent Claim
62 words
The field effect transistor of claim 122 wherein at least said predetermined depth is further selected to produce a first gate capacitance upon biasing said gate electrode from below the threshold voltage of said field effect transistor to said threshold voltage, and to produce a second gate capacitance upon biasing said gate electrode from above said threshold voltage to said threshold voltage.
Claim 150
Dependent Claim
90 words
The field effect transistor of claim 122 further comprising a substrate contact for electrically contacting said substrate; wherein said gate electrode includes a polysilicon layer of said first conductivity type and a conductive electrode on said polysilicon layer opposite said gate insulating layer; at least said predetermined depth being selected to produce a voltage at said substrate surface, adjacent said gate insulating layer, which is equal and opposite to the sum of the voltage between said substrate contact and said substrate and between said polysilicon layer and said conductive electrode.
Claim 151
Dependent Claim
57 words
The field effect transistor of claim 122 wherein said gate insulating layer is of predetermined thickness, and wherein at least said predetermined depth is further selected to produce a threshold voltage for said field effect transistor which is independent of said predetermined thickness, and current for said field effect transistor which increases inversely to said predetermined thickness.
Claim 152
Dependent Claim
215 words
A field effect transistor comprising: a semiconductor substrate of first conductivity type; a tub region of second conductivity type in said substrate at a surface thereof, and extending into said substrate a first predetermined depth from said substrate surface; spaced apart source and drain regions of said second conductivity type in said tub region at said substrate surface; a bottom leakage controlling region of said first conductivity type in said substrate, extending across said substrate between extensions of said source and drain regions and extending into said substrate from a second depth which is less than said first predetermined depth to a third depth which is greater than said first predetermined depth; a gate insulating layer on said substrate at said substrate surfacer between said spaced apart source and drain regions; and source, drain and gate electrodes contacting said source and drain regions and said gate insulating layer, respectively; wherein at least said first predetermined depth being selected to allow carriers of said second conductivity type to flow from said source region to said drain region in said tub region, extending from a fourth predetermined depth between said first predetermined depth and said substrate surface towards said surface, upon application of voltage to said gate electrode beyond the threshold voltage of said field effect transistor.
Claim 153
Dependent Claim
215 words
A field effect transistor comprising: a semiconductor substrate of first conductivity type; a tub region of second conductivity type in said substrate at a surface thereof, and extending into said substrate a first predetermined depth from said substrate surface; spaced apart source and drain regions of said second conductivity type in said tub region at said substrate surface; a bottom leakage controlling region of said first conductivity type in said substrate, extending across said substrate between extensions of said source and drain regions and extending into said substrate from a second depth which is less than said first predetermined depth to a third depth which is greater than said first predetermined depth; a gate insulating layer on said substrate at said substrate surfacer between said spaced apart source and drain regions; and source, drain and gate electrodes contacting said source and drain regions and said gate insulating layer, respectively; wherein at least said first predetermined depth being selected to allow carriers of said second conductivity type to flow from said source region to said drain region in said tub region, extending from a fourth predetermined depth between said first predetermined depth and said substrate surface towards said surface, upon application of voltage to said gate electrode beyond the threshold voltage of said field effect transistor.
Claim 154
Dependent Claim
41 words
The field effect transistor of claim 144 wherein said substrate is doped said first conductivity type at a relatively low doping concentration and wherein said bottom leakage control region is doped said first conductivity type at a relatively high doping concentration.
Claim 155
Dependent Claim
36 words
The field effect transistor of claim 144 wherein at least said first predetermined depth is selected to produce a threshold voltage for said field effect transistor which is twice the Fermi potential of said semiconductor substrate.
References Cited (Backward Citations)
US3653978A
Cited
US3789504A
Cited
US3872491A
Cited
US4042945A
Cited
US4994872A
Cited
US4108686A
Cited
JPS5587483A
Cited
JPS5587481A
Cited
US4274105A
Cited
JPS5691473A
Cited
JPS5710268A
Cited
EP0070744A2
Cited
EP0073623A2
Cited
SU1097139A1
Cited
USRE32800E
Cited
US4491807A
Cited
JPS5929460A
Cited
US4697198A
Cited
JPS6153775A
Cited
JPS61160975A
Cited
US4831422A
Cited
US4737471A
Cited
US4819043A
Cited
US4841346A
Cited
JPS62248255A
Cited
US4771012A
Cited
JPS6353975A
Cited
US5192990A
Cited
EP0274278A1
Cited
US4928156A
Cited
US4907048A
Cited
US4899202A
Cited
US4984043A
Cited
US4990974A
Cited
US5151759A
Cited
US5119152A
Cited
US5194923A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-12-19 | 1998-06-20 | 1998-12-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-12-19 | 2002-06-20 | 2002-12-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-12-19 | 2006-06-20 | 2006-12-20 | $7700.00 | Window Closed / Lapsed |