Patent US4757467A successfully refreshed from Google Patents.
Patent US1706676A successfully refreshed from Google Patents.
Patent US5369044A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5369044A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for producing a semiconductor device

Assignee: Mitsubishi Electric Corp
•
Filing: 1993-07-20
•
Granted: 1994-11-29
•
Expires: 2013-07-20
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A method for producing a field effect transistor including a layer in which a two-dimensional electron gas is formed includes forming source and drain electrodes spaced from each other on a substrate structure including the layer in which a two-dimensional electron gas is formed. First and second resist films are sequentially applied to the structure and a stripe-shaped first opening is formed in the second resist film between the source and drain electrodes and extending in a longitudinal direction, perpendicular to a line connecting the source and drain electrodes. A plurality of second openings narrower than the first opening are formed within the first resist film in the first opening. The second openings are arranged at intervals along the longitudinal direction of the first opening. The second openings may be used as an etching mask to form recesses in the substrate structure not reaching the layer in which the two-dimensional electron gas is formed. A gate electrode is formed by depositing a gate metal on the remaining parts of the first and second resist films and in the second openings followed by lifting off unneeded parts of the gate metal and the first and second resist films.

Inventors

  • 👤 Teruyuki Shimura

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 03:36
CPC Classifications
B; B82; B82Y; B82Y10/00; H; H10; H10D; H10D30/00; H10D30/40; H10D30/43; Y; Y02; Y02E; Y02E10/00; Y02E10/50; Y02E10/548; Y10; Y10S; Y10S148/00; Y10S148/11

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 152 words
A method for producing a semiconductor device comprising: forming source and drain electrodes spaced from each other on a substrate structure including a layer in which a two-dimensional electron gas is formed; applying a first resist to the entire surface of the substrate structure and a second resist to the first resist; forming a stripe-shaped first opening through the second resist between the source and drain electrodes which has a width and extends in a direction perpendicular to a direction connecting the source and drain electrodes; forming a plurality of second openings in the first resist in the first opening, the second openings being narrower than the first opening and arranged at intervals along a longitudinal direction of the first opening; and depositing a gate metal on the entire surface and removing unnecessary portions of the gate metal together with the first and second resists by lift-off to form a gate electrode.
Claim 2
Independent Claim 152 words
A method for producing a semiconductor device comprising: forming source and drain electrodes spaced from each other on a substrate structure including a layer in which a two-dimensional electron gas is formed; applying a first resist to the entire surface of the substrate structure and a second resist to the first resist; forming a stripe-shaped first opening through the second resist between the source and drain electrodes which has a width and extends in a direction perpendicular to a direction connecting the source and drain electrodes; forming a plurality of second openings in the first resist in the first opening, the second openings being narrower than the first opening and arranged at intervals along a longitudinal direction of the first opening; and depositing a gate metal on the entire surface and removing unnecessary portions of the gate metal together with the first and second resists by lift-off to form a gate electrode.
Claim 3
Dependent Claim 54 words
The method of claim 1 including forming a plurality of recesses in the substrate structure not reaching the layer in which the two-dimensional electron gas is formed in the substrate structure between the source and drain electrodes using the first and second resists and the second openings in the first resist as a mask.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-11-28 1998-05-30 1998-11-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-11-28 2002-05-30 2002-11-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-11-28 2006-05-30 2006-11-29 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag