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US5006478A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for manufacture of semiconductor device

Assignee: Sony Corp
•
Filing: 1990-07-24
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Granted: 1991-04-09
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Expires: 2010-07-24
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Abstract

Abstract A method for manufacturing a semiconductor device, comprising the steps of forming a first resist layer, an intermediate layer and a second resist layer sequentially on a substrate; forming an aperture by removing a portion of the second resist layer where a T-shaped gate is to be later formed; over-etching a portion of the intermediate layer opposed to the aperture thereby forming in the intermediate layer an aperture larger than the first-mentioned aperture; and forming, in the first resist layer, an aperture which is smaller than the aperture in the second resist layer which is positioned inside thereof. Due to the combination of such successive steps, the lift-off process required to form a desires T-shaped gate can be substantially improved.

Inventors

  • 👤 Junichiro Kobayashi
  • 👤 Shigeru Hiramatsu
  • 👤 Hidemi Takakuwa

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 11:20
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/061; H10D30/0612; H10D30/80; H10D30/87; H10D64/00; H10D64/01; H10D64/012; H10D64/0124; H10D64/0125; Y; Y10; Y10S; Y10S148/00; Y10S148/10; Y10S148/143

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 101 words
A method for manufacturing a semiconductor device, comprising the steps of: sequentially forming a first resist layer, an intermediate layer and a second resist layer on a substrate; forming an aperture by removing a portion of said second resist layer where a T-shaped gate is to be later formed; over-etching a portion of said intermediate layer which is opposed to said aperture thereby forming in said intermediate layer an aperture larger than the first-mentioned aperture; and forming in said first resist layer an aperture which is smaller than the aperture in said second resist layer and which is positioned inside thereof.
Claim 2
Independent Claim 101 words
A method for manufacturing a semiconductor device, comprising the steps of: sequentially forming a first resist layer, an intermediate layer and a second resist layer on a substrate; forming an aperture by removing a portion of said second resist layer where a T-shaped gate is to be later formed; over-etching a portion of said intermediate layer which is opposed to said aperture thereby forming in said intermediate layer an aperture larger than the first-mentioned aperture; and forming in said first resist layer an aperture which is smaller than the aperture in said second resist layer and which is positioned inside thereof.
Claim 3
Dependent Claim 48 words
In a method according to claim 1 forming a T-shaped gate in said apertures of said first and second resist layers, and lifting off from said substrate said first resist layer, said intermediate layer and said second resist layer so that said T-shaped gate remains on said substrate.
Claim 4
Dependent Claim 15 words
In a method according to claim 1 wherein said intermediate layer is formed of metal.
Claim 5
Dependent Claim 15 words
In a method according to claim 3 wherein said intermediate layer is made of aluminum.
Claim 6
Dependent Claim 17 words
In a method according to claim 1 wherein said intermediate layer is formed of a non-metallic material.
Claim 7
Independent Claim 108 words
A method for manufacturing a semiconductor device, comprising the steps of: sequentially forming a first resist layer, an intermediate layer and a second resist layer on a substrate; exposing said first and second resist layers, forming an aperture by removing a portion of said second resist layer where a T-shaped gate is to be later formed; over-etching a portion of said intermediate layer which is opposed to said aperture thereby forming in said intermediate layer an aperture larger than the first-mentioned aperture; and forming in said first resist layer an aperture which is smaller than the aperture in said second resist layer and which is positioned inside thereof.
Claim 8
Independent Claim 108 words
A method for manufacturing a semiconductor device, comprising the steps of: sequentially forming a first resist layer, an intermediate layer and a second resist layer on a substrate; exposing said first and second resist layers, forming an aperture by removing a portion of said second resist layer where a T-shaped gate is to be later formed; over-etching a portion of said intermediate layer which is opposed to said aperture thereby forming in said intermediate layer an aperture larger than the first-mentioned aperture; and forming in said first resist layer an aperture which is smaller than the aperture in said second resist layer and which is positioned inside thereof.
Claim 9
Dependent Claim 47 words
A method according to claim 6 forming a T-shaped gate in said apertures of said first and second resist layers, and lifting off from said substrate said first resist layer, said intermediate layer and said second resist layer so that said T-shaped gate remains on said substrate.
Claim 10
Dependent Claim 14 words
A method according to claim 6 wherein said intermediate layer is formed of metal.
Claim 11
Dependent Claim 14 words
A method according to claim 7 wherein said intermediate layer is formed of aluminum.
Claim 12
Dependent Claim 16 words
A method according to claim 6 wherein said intermediate layer is formed of a non-metallic material.

References Cited (Backward Citations)

US3994758A Cited
US4283483A Cited
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US4871687A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-04-08 1994-10-08 1995-04-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-04-08 1998-10-08 1999-04-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-04-08 2002-10-08 2003-04-09 $7700.00 Window Closed / Lapsed

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