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US5366922A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for producing CMOS transistor

Assignee: Seiko Instruments Inc
•
Filing: 1993-11-22
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Granted: 1994-11-22
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Expires: 2013-11-22
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Abstract

Abstract The method of producing a CMOS transistor device. A pair of device regions are formed in separated relation from each other by a field oxide film on a pair of corresponding well regions formed in a semiconductor substrate. A gate insulating film and a gate electrode is sequentially formed on each of the device regions. The gate insulating film is removed through a mask of the patterned gate electrode to expose a silicon active surface at least in one of the device regions. A diborane gas containing P type impurity of boron is applied to the silicon active surface to form thereon a boron absorption film. N type impurity of arsenic is doped into the other device region by ion implantation to form N type of source and drain regions while masking the one device region. The boron is diffused from the adsorption film into the one device region to form P type of source and drain regions by annealing of the substrate.

Inventors

  • 👤 Kenji Aoki
  • 👤 Naoto Saito

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 20:49
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/017; H10D84/02; H10D84/03; H10D84/038; H10P; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/17; H10P32/171; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/859; Y; Y10; Y10S; Y10S148/00; Y10S148/034

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 261 words
A method of producing a CMOS transistor device, comprising: the first step of forming a P type MOS device region and an N type MOS device region adjacent to each other in a surface portion of a semiconductor substrate; the second step of forming sequentially a gate insulating film and a gate electrode on the gate insulating film on each of the device regions; the third step of removing the gate insulating film on each of the device regions using the associated gate electrode as a mask, and then exposing an active semiconductor surface on each of the device regions; the fourth step of applying a gas containing an impurity component of P conductivity type to the exposed active semiconductor surface to form thereon an adsorption film composed of the impurity component of P conductivity type; the fifth step of forming a resist layer on the P type MOS device region; the sixth step of removing the adsorption film formed in the fourth step from the N type MOS device region, using the resist layer formed in the fifth step as a mask; the seventh step of ion implanting an N conductivity type impurity component into the N type MOS device region to form N type MOS device source and drain regions using the resist layer as a mask; and the eighth step of effecting solid-phase diffusion of the impurity component of P conductivity type from a diffusion source composed of the adsorption film to form source and drain regions of P conductivity type in said P type MOS device region.
Claim 2
Independent Claim 261 words
A method of producing a CMOS transistor device, comprising: the first step of forming a P type MOS device region and an N type MOS device region adjacent to each other in a surface portion of a semiconductor substrate; the second step of forming sequentially a gate insulating film and a gate electrode on the gate insulating film on each of the device regions; the third step of removing the gate insulating film on each of the device regions using the associated gate electrode as a mask, and then exposing an active semiconductor surface on each of the device regions; the fourth step of applying a gas containing an impurity component of P conductivity type to the exposed active semiconductor surface to form thereon an adsorption film composed of the impurity component of P conductivity type; the fifth step of forming a resist layer on the P type MOS device region; the sixth step of removing the adsorption film formed in the fourth step from the N type MOS device region, using the resist layer formed in the fifth step as a mask; the seventh step of ion implanting an N conductivity type impurity component into the N type MOS device region to form N type MOS device source and drain regions using the resist layer as a mask; and the eighth step of effecting solid-phase diffusion of the impurity component of P conductivity type from a diffusion source composed of the adsorption film to form source and drain regions of P conductivity type in said P type MOS device region.
Claim 3
Dependent Claim 32 words
A method according to claim 1, wherein said fourth step comprises heating the substrate to a temperature at about 800° C. to form the adsorption film on the exposed active semiconductor surface.
Claim 4
Dependent Claim 41 words
A method according to claim 1, wherein the fourth step comprises applying a diborane gas containing a P type impurity component of boron to the active semiconductor surface to form an adsorption film containing the P type impurity component of boron.

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3.5 Years (Year 4) 1997-11-21 1998-05-23 1998-11-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-11-21 2002-05-23 2002-11-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-11-21 2006-05-23 2006-11-22 $7700.00 Window Closed / Lapsed

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