US4996168A
Expired / Lapsed
US
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Method for manufacturing P type semiconductor device employing diffusion of boron glass
Assignee: Mitsubishi Electric Corp
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Filing: 1988-11-01
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Granted: 1991-02-26
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Expires: 2008-11-01
Abstract
Abstract An improved method for manufacturing P type semiconductor device such as used for memories is disclosed. Channeling such as caused by an ion implantation process is prevented by adopting a diffusion method to diffuse boron (7) from a boron glass formed on a layer of polysilicon or silicon oxide on a semiconductor substrate. This method provides a semiconductor device with shallow P type impurity diffusion regions.
Inventors
- 👤 Hiroji Ozaki
- 👤 Shigeo Nagao
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 06:40
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/017; H10D84/02; H10D84/03; H10D84/038; H10P; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/141; H10P32/17; H10P32/171; H10P76/00; H10P76/40; H10B; H10B12/00
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
232 words
A method for manufacturing a P-type semiconductor device, comprising preparing a semiconductor substrate having a main surface and a region having a predetermined N-type impurity concentration; forming a conductor layer having an upper portion and opposite end portions on the main surface of the semiconductor substrate, and an insulating film on portions spaced at predetermined intervals apart from the opposite portions of a predetermined width of the main surface of the semiconductor substrate; forming a diffusion preventing layer on the upper and opposite end portions of the conductor layer and on the spaced apart portions of the insulating layer, and on portions spaced at predetermined intervals apart from the opposite end portions of the conductor layer of the main surface contiguous to the conductor layer and the insulating layer; forming a first layer comprising polysilicon or silicon oxide on the diffusion preventing layer and on the region of the main surface of said semiconductor substrate where the diffusion preventing layer is not formed for a boron glass to be formed on the main surface of the semiconductor substrate; forming a first boron glass by depositing first boron nitride on the first layer of polysilicon or silicon oxide; and forming a first P-type diffusion layer by diffusing the first boron glass to thereby form a shallow P-type diffusion layer in the substrate on the region where the diffusion preventing layer does not exist.
Claim 2
Independent Claim
232 words
A method for manufacturing a P-type semiconductor device, comprising preparing a semiconductor substrate having a main surface and a region having a predetermined N-type impurity concentration; forming a conductor layer having an upper portion and opposite end portions on the main surface of the semiconductor substrate, and an insulating film on portions spaced at predetermined intervals apart from the opposite portions of a predetermined width of the main surface of the semiconductor substrate; forming a diffusion preventing layer on the upper and opposite end portions of the conductor layer and on the spaced apart portions of the insulating layer, and on portions spaced at predetermined intervals apart from the opposite end portions of the conductor layer of the main surface contiguous to the conductor layer and the insulating layer; forming a first layer comprising polysilicon or silicon oxide on the diffusion preventing layer and on the region of the main surface of said semiconductor substrate where the diffusion preventing layer is not formed for a boron glass to be formed on the main surface of the semiconductor substrate; forming a first boron glass by depositing first boron nitride on the first layer of polysilicon or silicon oxide; and forming a first P-type diffusion layer by diffusing the first boron glass to thereby form a shallow P-type diffusion layer in the substrate on the region where the diffusion preventing layer does not exist.
Claim 3
Dependent Claim
27 words
The method for manufacturing a P-type semiconductor device of claim 1, wherein the first layer for the boron glass to be formed on comprises a thin polysilicon.
Claim 4
Dependent Claim
27 words
The method for manufacturing a P-type semiconductor device of claim 1, wherein the first layer for the boron glass to be formed on comprises a thin oxide.
Claim 5
Dependent Claim
34 words
The method for manufacturing a P-type semiconductor device of claim 1, further comprising removing the first layer for the boron glass to be formed on the boron glass after forming the P-type diffusion layer.
Claim 6
Dependent Claim
23 words
The method for manufacturing semiconductor device of claim 4, wherein the conductor layer and the P-type diffusion layer form a field effect device.
Claim 7
Dependent Claim
55 words
The method for manufacturing a semiconductor device of claim 5, wherein the field effect device comprises a P channel field effect transistor in which the conductor layer is a gate electrode; the P-type diffusion layer is either a drain or source region; and the portion sandwiched by the diffusion layer is a P channel region.
Claim 8
Dependent Claim
109 words
The method for manufacturing a semiconductor device of claim 6, further comprising after removing the first layer and the first boron glass forming a second layer for the boron glass to be formed on a region of the main surface of the semiconductor substrate smaller than the region where the diffusion preventing layer is not formed; forming a second boron glass on the second layer for the boron glass to be formed; and forming a second P-type diffusion layer in the substrate on a region smaller than the first P-type diffusion layer by diffusing said second boron glass to thereby form an LDD type P channel field effect transistor.
Claim 9
Dependent Claim
52 words
The method for manufacturing a semiconductor device of claim 7, wherein the first P-type diffusion layer has a first P-type impurity concentration; the second P-type diffusion layer has a second P-type impurity concentration; and the first P-type impurity concentration is selected so as to be lower than the second P-type impurity concentration.
Claim 10
Dependent Claim
156 words
The method for manufacturing a semiconductor device of claim 6, wherein the main surface of the semiconductor substrate and one portion of the region where the diffusion preventing layer is not formed comprise a contact region connecting the P-type diffusion layer to a wiring layer; the method further comprising forming a second diffusion preventing layer on the region other than the contact region of the P channel field effect transistor where the P-type diffusion layer is formed; forming a third layer for the boron glass to be formed on the main surface of the semiconductor substrate in the region where the second diffusion preventing layer is not formed; forming a third boron glass on the third layer for the boron glass to be formed on; and forming a third P-type diffusion layer on the inside of the first P-type diffusion layer by diffusing the third boron glass, thereby reducing the contact resistance of the contact region.
Claim 11
Dependent Claim
31 words
The method for manufacturing a semiconductor device of claim 6, wherein the P channel field effect transistor comprises a P channel field effect transistor used as a complementary field effect transistor.
Claim 12
Dependent Claim
35 words
The method for manufacturing a semiconductor device of claim 10, wherein the complementary field effect transistor comprises a complementary field effect transistor used in a peripheral circuit portion of a dynamic type semiconductor memory device.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-02-25 | 1994-08-27 | 1995-02-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-02-25 | 1998-08-27 | 1999-02-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-02-25 | 2002-08-27 | 2003-02-26 | $7700.00 | Window Closed / Lapsed |