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Heterojunction field effect transistor

Assignee: Mitsubishi Electric Corp
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Filing: 1991-06-21
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Granted: 1994-02-08
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Expires: 2011-06-21
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Abstract

Abstract A heterojunction field effect transistor includes a semi-insulating crystalline layer, a pseudomorphic channel layer disposed on the semi-insulating crystalline layer, and an electron supply layer disposed on said pseudomorphic layer. The channel layer has a lattice constant equal to or close to that of the semi-insulating crystalline layer adjacent to semi-insulating crystalline layer and different from the semi-insulating crystalline layer adjacent to the electron supply layer.

Inventors

  • 👤 Koichi Narita
  • 👤 Kazuo Hayashi
  • 👤 Takuji Sonoda

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 21:55
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/40; H10D30/47; H10D30/471; H10D30/473; H10D30/4732

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 132 words
A heterojunction field effect transistor comprising: a semi-insulating indium phosphide crystalline layer; a pseudomorphic channel layer having a bandgap energy and disposed on said semi-insulating crystalline layer; an AlInAs buffer layer disposed between and contacting said semi-insulating indium phosphide layer and said pseudomorphic channel layer; an electron supply layer; and a spacer layer of AlInAs interposed between and contacting said pseudomorphic channel layer and said electron supply layer, said pseudomorphic channel layer being In w Ga 1-w As adjacent to said electron supply layer, where w is within a range of 0.50 to 0.70, the band gap energy of said pseudomorphic channel layer increasing to a maximum adjacent to said semi-insulating crystalline layer, and said pseudomorphic channel layer being In 0 .47 Ga 0 .53 As adjacent to said semi-insulating crystalline layer.
Claim 2
Dependent Claim 132 words
A heterojunction field effect transistor comprising: a semi-insulating indium phosphide crystalline layer; a pseudomorphic channel layer having a bandgap energy and disposed on said semi-insulating crystalline layer; an AlInAs buffer layer disposed between and contacting said semi-insulating indium phosphide layer and said pseudomorphic channel layer; an electron supply layer; and a spacer layer of AlInAs interposed between and contacting said pseudomorphic channel layer and said electron supply layer, said pseudomorphic channel layer being In w Ga 1-w As adjacent to said electron supply layer, where w is within a range of 0.50 to 0.70, the band gap energy of said pseudomorphic channel layer increasing to a maximum adjacent to said semi-insulating crystalline layer, and said pseudomorphic channel layer being In 0 .47 Ga 0 .53 As adjacent to said semi-insulating crystalline layer.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-02-07 1997-08-09 1998-02-08 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-02-07 2001-08-09 2002-02-08 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-02-07 2005-08-09 2006-02-08 $7700.00 Window Closed / Lapsed

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