US5268329A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of fabricating an integrated circuit interconnection
Assignee: Nokia Bell Labs
•
Filing: 1991-11-08
•
Granted: 1993-12-07
•
Expires: 2011-11-08
Abstract
Abstract A conductive layer is formed beneath a runner in an integrated circuit. The conductive layer is also formed within vias. The conductive layer preserves electrical connection should the runner separate due, perhaps, to electromigration or stress voiding. The conductive layer also provides protection against various failures or defects which may occur in the runner material within the vias.
Inventors
- 👤 Sailesh Chittipeddi
- 👤 Michael J. Kelly
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 07:24
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/071; H10W20/081; H10W20/084; H10W20/40; H10W20/41; H10W20/425; Y; Y10; Y10S; Y10S438/00; Y10S438/927
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
122 words
A method of semiconductor integrated circuit fabrication comprising: forming a dielectric covering a raised first aluminum-rich conductor; forming an opening in said dielectric, said opening exposing a portion of said first conductor; forming a layer of refractory metal silicide upon said dielectric and within said opening and contacting said raised first conductor; forming a layer of titanium nitride upon said layer of refractory metal silicide by reactive sputter deposition from a refractory metal target in a nitrogen atmosphere; forming a second aluminum-rich conductive material layer contacting said titanium nitride layer within said opening and contacting said titanium nitride layer upon said dielectric; patterning said second conductive layer and said titanium nitride layer and said refractory metal silicide layer to form a runner.
Claim 2
Independent Claim
122 words
A method of semiconductor integrated circuit fabrication comprising: forming a dielectric covering a raised first aluminum-rich conductor; forming an opening in said dielectric, said opening exposing a portion of said first conductor; forming a layer of refractory metal silicide upon said dielectric and within said opening and contacting said raised first conductor; forming a layer of titanium nitride upon said layer of refractory metal silicide by reactive sputter deposition from a refractory metal target in a nitrogen atmosphere; forming a second aluminum-rich conductive material layer contacting said titanium nitride layer within said opening and contacting said titanium nitride layer upon said dielectric; patterning said second conductive layer and said titanium nitride layer and said refractory metal silicide layer to form a runner.
Claim 3
Independent Claim
125 words
A method of semiconductor integrated circuit fabrication comprising: forming a dielectric layer covering a raised first aluminum-rich conductor; forming an opening in said dielectric layer, said opening exposing a portion of said first conductor; forming a layer of titanium nitride upon said dielectric and within said opening and contacting said first conductor; forming a refractory metal silicide material layer upon said layer of titanium nitride, said silicide being formed by inert sputter deposition from a refractory silicide target; forming a second aluminum-rich conductive material layer contacting said refractory metal silicide layer within said opening and contacting said refractory metal silicide layer upon said dielectric; patterning said second conductive material layer and said refractory metal silicide layer and said titanium nitride layer to form a runner.
Claim 4
Independent Claim
125 words
A method of semiconductor integrated circuit fabrication comprising: forming a dielectric layer covering a raised first aluminum-rich conductor; forming an opening in said dielectric layer, said opening exposing a portion of said first conductor; forming a layer of titanium nitride upon said dielectric and within said opening and contacting said first conductor; forming a refractory metal silicide material layer upon said layer of titanium nitride, said silicide being formed by inert sputter deposition from a refractory silicide target; forming a second aluminum-rich conductive material layer contacting said refractory metal silicide layer within said opening and contacting said refractory metal silicide layer upon said dielectric; patterning said second conductive material layer and said refractory metal silicide layer and said titanium nitride layer to form a runner.
References Cited (Backward Citations)
US3657029A
Cited
GB1596907A
Cited
US4816424A
Cited
DE3414781A1
Cited
US4619839A
Cited
US4800177A
Cited
US4910578A
Cited
US4755480A
Cited
US4910169A
Cited
US4884123A
Cited
US4812419A
Cited
JPS63292653A
Cited
JPS645035A
Cited
US4818661A
Cited
US4784973A
Cited
US4987562A
Cited
US4981550A
Cited
US4962414A
Cited
JPH01211948A
Cited
US4897709A
Cited
EP0343269A1
Cited
EP0353120A1
Cited
JPH0235753A
Cited
EP0354717A2
Cited
US4829024A
Cited
US4952524A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-12-06 | 1997-06-07 | 1997-12-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-12-06 | 2001-06-07 | 2001-12-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-12-06 | 2005-06-07 | 2005-12-07 | $7700.00 | Window Closed / Lapsed |