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US5240872A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of manufacturing semiconductor device having interconnection layer contacting source/drain regions

Assignee: Mitsubishi Electric Corp
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Filing: 1992-08-06
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Granted: 1993-08-31
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Expires: 2012-08-06
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Abstract

Abstract A semiconductor device includes a MOS type field effect transistor whose gate electrode (4) has its surface covered with a first insulating film (5) and left and right sides provided with a pair of second insulating films (10). A first conductive layer (12, 13) is formed on the surface of the source/drain region (8, 11) and the surface of one of a pair of second insulating films (10) which are positioned on one side of the gate electrode (4). A third insulating film (24b) is formed at least on the surface of the second insulating film (10) on which the first conductive layer (12, 13) is not formed. A second conductive layer (18) is provided on the surface of the third insulating film (24b) and on the source/drain region (8, 11) on which the third insulating film (24b) is formed. This structure enables provision of a semiconductor device in which a contact hole can be formed in self-alignment, independent from the influence of errors in the step of patterning a resist mask.

Inventors

  • 👤 Kaoru Motonami
  • 👤 Natsuo Ajika
  • 👤 Atsushi Hachisuka
  • 👤 Yoshinori Okumura
  • 👤 Yasushi Matsui

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 17:36
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/05; H10B12/30; H10B12/31; H10B12/318; H10W; H10W20/00; H10W20/40

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 330 words
A method of manufacturing a semiconductor device comprising the steps of: forming a gate electrode (7) having its upper portion covered with a first insulating film (5) on a surface of an active region of a first conductivity type of a semiconductor substrate (1), with a gate insulating film (3) formed therebetween; depositing an insulating film (9) on the entire surface of said semiconductor substrate (1), and anisotropically etching the same to form a pair of second insulating films (10) on left and right sides of said gate electrode (7); irradiating impurity ions of a second conductivity type to the entire surface of said semiconductor substrate (1) to form impurity diffused regions (8, 11) by using said gate electrode (7) only and/or by using both said gate electrode (7) and said second insulating films (10) as masks; after said second insulating films (10) are formed, selectively forming a first conductivity layer (12, 13) with its upper surface covered with an insulating film (22) extending at least from a prescribed position on the surface of said gate electrode (7) to a surface of one of said pair of second insulating films (10) and the surface of the impurity diffused regions (8, 11) adjacent thereto; after the first conductive layer (12, 13) is formed, depositing an insulating film (23) at least near a side end portion of said gate electrode (7) on which said first conductive layer (12, 13) is not formed, and anisotropically etching the same to form a third insulating film (24b) at least on the surface of one of said pair of said second insulating films (10) on which said first conductive layer (12, 13) is not formed; and after the third insulating film (24b) is formed, selectively forming a second conductive layer (18) at least on the surface of said third insulating film (24b) and on the surface of one of said impurity diffused regions (8, 11) on which said first conductive layer (12, 13) is not formed.
Claim 2
Independent Claim 330 words
A method of manufacturing a semiconductor device comprising the steps of: forming a gate electrode (7) having its upper portion covered with a first insulating film (5) on a surface of an active region of a first conductivity type of a semiconductor substrate (1), with a gate insulating film (3) formed therebetween; depositing an insulating film (9) on the entire surface of said semiconductor substrate (1), and anisotropically etching the same to form a pair of second insulating films (10) on left and right sides of said gate electrode (7); irradiating impurity ions of a second conductivity type to the entire surface of said semiconductor substrate (1) to form impurity diffused regions (8, 11) by using said gate electrode (7) only and/or by using both said gate electrode (7) and said second insulating films (10) as masks; after said second insulating films (10) are formed, selectively forming a first conductivity layer (12, 13) with its upper surface covered with an insulating film (22) extending at least from a prescribed position on the surface of said gate electrode (7) to a surface of one of said pair of second insulating films (10) and the surface of the impurity diffused regions (8, 11) adjacent thereto; after the first conductive layer (12, 13) is formed, depositing an insulating film (23) at least near a side end portion of said gate electrode (7) on which said first conductive layer (12, 13) is not formed, and anisotropically etching the same to form a third insulating film (24b) at least on the surface of one of said pair of said second insulating films (10) on which said first conductive layer (12, 13) is not formed; and after the third insulating film (24b) is formed, selectively forming a second conductive layer (18) at least on the surface of said third insulating film (24b) and on the surface of one of said impurity diffused regions (8, 11) on which said first conductive layer (12, 13) is not formed.
Claim 3
Dependent Claim 69 words
A method of manufacturing a semiconductor device according to claim 1, wherein a material having higher selectivity to etching than a material of said first insulating film (5) is used as a material of the insulating film used for forming the third insulating film (24b) which is deposited entirely on said semiconductor substrate (1) after formation of said first conductive layer (12, 13) and is subjected to anisotropic etching.
Claim 4
Dependent Claim 53 words
A method of manufacturing a semiconductor device according to claim 1, wherein said step of forming said third insulating film (24b) is effected by depositing, after said first conductive layer (12, 13) is formed, an insulating film (23) on the entire surface of said semiconductor substrate (1) and by anisotropically etching the same.
Claim 5
Dependent Claim 77 words
A method of manufacturing a semiconductor device according to claim 1, wherein said step of forming said third insulating film (24 b) is effected before forming said first conductive layer (12, 13), by covering a region of said semiconductor substrate (1), on which said first conductive layer (12, 13) is formed, with a resist mask, depositing an insulating film on the entire surface of said semiconductor substrate (1) in this state, and by anisotropically etching the same.

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-08-30 1997-03-01 1997-08-31 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-08-30 2001-03-01 2001-08-31 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-08-30 2005-03-01 2005-08-31 $7700.00 Window Closed / Lapsed

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