Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
193 words
A dynamic random access memory device comprising a semiconductor substrate (11, 31) having a source region and a drain region (14S, 14D, 34S, 34D); a first insulation film (13, 33) formed on a surface of the semiconductor substrate; a gate electrode (WL3, WL5) formed on the first insulation film; and a second insulation film (15, 35) formed so as to cover the gate electrode, characterized in that the device further comprises a bit line (BL1, BL22, BL32, BL4) formed on the second insulation film, the bit line being in contact with the source region (14S, 34S) through a first opening (16, 16a, 36) formed in the first and second insulation films; a third insulation film (18, 23, 38) formed so as to cover the bit line; a storage electrode (20a, 25a, 45) formed on the third insulation film and being in contact with the drain region (14D, 34D) through a second opening (20A, 24, 44) formed in the first, second and third insulation films; a dielectric film (21, 26, 46) formed so as to surround the storage electrode; and an opposed electrode (22, 27, 47) formed so as to cover the dielectric film.
Claim 2
Dependent Claim
193 words
A dynamic random access memory device comprising a semiconductor substrate (11, 31) having a source region and a drain region (14S, 14D, 34S, 34D); a first insulation film (13, 33) formed on a surface of the semiconductor substrate; a gate electrode (WL3, WL5) formed on the first insulation film; and a second insulation film (15, 35) formed so as to cover the gate electrode, characterized in that the device further comprises a bit line (BL1, BL22, BL32, BL4) formed on the second insulation film, the bit line being in contact with the source region (14S, 34S) through a first opening (16, 16a, 36) formed in the first and second insulation films; a third insulation film (18, 23, 38) formed so as to cover the bit line; a storage electrode (20a, 25a, 45) formed on the third insulation film and being in contact with the drain region (14D, 34D) through a second opening (20A, 24, 44) formed in the first, second and third insulation films; a dielectric film (21, 26, 46) formed so as to surround the storage electrode; and an opposed electrode (22, 27, 47) formed so as to cover the dielectric film.
Claim 3
Dependent Claim
42 words
A dynamic random access memory device as claimed in claim 1, characterized in that the first opening (16, 16a, 36) and the second opening (20A, 24, 44) are aligned in the direction of extension of the bit line (BL1, BL22, BL32, BL4).
Claim 4
Dependent Claim
47 words
A dynamic random access memory device as claimed in claim 1, characterized in that a distance between the bit line and the first opening (16, 16a, 36) is smaller than a distance between the bit line (BL1, BL22, BL32, BL4) and the second opening (20A, 24, 44).
Claim 5
Dependent Claim
37 words
A dynamic random access memory device as claimed in claim 1, characterized in that the second opening (24) is a contact hole formed by self-alignment in which the bit line (BL32) is used as a mask film.
Claim 6
Dependent Claim
40 words
A dynamic random access memory device as claimed in claim 1, characterized in that the bit line (BL1, BL22, BL32, BL4) comprises a polycide film composed of a polysilicon film, and a refractory metal film formed on said polysilicon film.
Claim 7
Dependent Claim
34 words
A dynamic random access memory device as claimed in claim 1, characterized by further comprising an insulation side wall film (49a) formed so as to surround a side wall of the bit line (BL1).
Claim 8
Dependent Claim
34 words
A dynamic random access memory device as claimed in claim 1, characterized by further comprising an insulation side wall film (48a) formed so as to surround a side wall of the gate electrode (WL3).
Claim 9
Dependent Claim
53 words
A dynamic random access memory device as claimed in claim 1, characterized in that the storage electrode (45) comprises a vertical portion (45a) which is in contact with the drain region (34D), and wing portions (45b) which are separated from each other with a gap and are connected to the vertical portion (45a).
Claim 10
Dependent Claim
26 words
A dynamic random access memory device as claimed in claim 1, characterized in that the wing portions of the storage electrode extend above the gate electrode.
Claim 11
Independent Claim
184 words
A method for producing a dynamic random access memory device comprising the step of forming a gate electrode (WL3, WL5) on a first insulation film (13, 33) formed on a semiconductor substrate and source and drain regions (14S, 14D, 34S, 34D) in the semiconductor substrate, characterized by comprising forming a second insulation film (15, 35) so as to cover the gate electrode; forming a first opening (16, 16a, 36) in the first and second insulation films; forming a bit line (BL1, BL22, BL32, BL4) being in contact with the source region through the first opening and overlying the second insulation film; forming a third insulation film (18, 23, 38) so as to cover the bit line; forming a second opening (20A, 24, 44) in the first, second and third insulation films; forming a storage electrode (20a, 25a, 45) being in contact with the drain region through the second opening and overlying the third insulation film; forming a dielectric film (21, 26, 46) so as to surround the storage electrode; and forming an opposed electrode (22, 27, 47) so as to cover the dielectric film.
Claim 12
Independent Claim
184 words
A method for producing a dynamic random access memory device comprising the step of forming a gate electrode (WL3, WL5) on a first insulation film (13, 33) formed on a semiconductor substrate and source and drain regions (14S, 14D, 34S, 34D) in the semiconductor substrate, characterized by comprising forming a second insulation film (15, 35) so as to cover the gate electrode; forming a first opening (16, 16a, 36) in the first and second insulation films; forming a bit line (BL1, BL22, BL32, BL4) being in contact with the source region through the first opening and overlying the second insulation film; forming a third insulation film (18, 23, 38) so as to cover the bit line; forming a second opening (20A, 24, 44) in the first, second and third insulation films; forming a storage electrode (20a, 25a, 45) being in contact with the drain region through the second opening and overlying the third insulation film; forming a dielectric film (21, 26, 46) so as to surround the storage electrode; and forming an opposed electrode (22, 27, 47) so as to cover the dielectric film.
Claim 13
Dependent Claim
95 words
A method for producing a dynamic random access memory device as claimed in claim 10, characterized in that the step of forming the storage electrode (45) comprises the steps of forming an insulation film (39) on the third insulation film (38) and forming a conductive film (40) on the insulation film (39), and in that the steps of forming the insulation film and forming the conductive film are repetitively carried out so as to form a stacked layer structure composed of a plurality of insulation films (39, 41, 43) and conductive films (40, 42, 45c).
Claim 14
Dependent Claim
61 words
A method for producing a dynamic random access memory device as claimed in claim 11, characterized in that the step of forming the storage electrode (45) further comprises the steps of patterning the plurality of conductive and insulation films (39 - 43, 45c) by an anisotropic etching process, and removing patterned insulation films (39, 41, 43) by an isotropic etching process.
Claim 15
Dependent Claim
70 words
A method for producing a dynamic random access memory device as claimed in claim 10, characterized by further comprising the steps of forming a fourth insulation film (48) so as to cover the gate electrode (WL3), and patterning the fourth insulation film by an anisotropic etching process so that a portion (48a) of the fourth insulation film around the gate electrode is left and functions as a side wall film.
Claim 16
Dependent Claim
69 words
A method for producing a dynamic random access memory device as claimed in claim 10, characterized by further comprising the steps of forming a fifth insulation film (49) so as to cover the bit line, and patterning the fifth insulation film by an anisotropic etching process so that a portion (49a) of the fifth insulation film around the bit line is left and functions as a side wall film.
Claim 17
Independent Claim
222 words
A method for producing a dynamic random access memory device comprising the step of forming a gate electrode (WL3) on a first insulation film (13) formed on a semiconductor substrate and source and drain regions (14S, 14D) in the semiconductor substrate, characterized by comprising forming a second insulation film (15) so as to cover the gate electrode; forming a first opening (16) in the first and second embodiment; forming a conductive film (17) on the second insulation film; forming a third insulation film (18) on the conductive film; patterning the conductive film (17) and the third insulation film (18) so as to shape a bit line (BL32) on which the third insulation film (18) remains; forming a fourth insulation film (23) on the bit line and the second insulation film; forming a second opening (24) in the first, second and fourth insulation films by a self-alignment process in which the bit line is used as a mask film so that the fourth insulation film (23) remains so as to surround a side wall of the bit line; forming a storage electrode (25a) being in contact with the drain region and overlying the third and fourth insulation films; forming a dielectric film (26) so as to surround the storage electrode; and forming an opposed electrode (27) so as to cover the dielectric film.
Claim 18
Independent Claim
222 words
A method for producing a dynamic random access memory device comprising the step of forming a gate electrode (WL3) on a first insulation film (13) formed on a semiconductor substrate and source and drain regions (14S, 14D) in the semiconductor substrate, characterized by comprising forming a second insulation film (15) so as to cover the gate electrode; forming a first opening (16) in the first and second embodiment; forming a conductive film (17) on the second insulation film; forming a third insulation film (18) on the conductive film; patterning the conductive film (17) and the third insulation film (18) so as to shape a bit line (BL32) on which the third insulation film (18) remains; forming a fourth insulation film (23) on the bit line and the second insulation film; forming a second opening (24) in the first, second and fourth insulation films by a self-alignment process in which the bit line is used as a mask film so that the fourth insulation film (23) remains so as to surround a side wall of the bit line; forming a storage electrode (25a) being in contact with the drain region and overlying the third and fourth insulation films; forming a dielectric film (26) so as to surround the storage electrode; and forming an opposed electrode (27) so as to cover the dielectric film.