EP0334761A1
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Method for forming a self-aligned source/drain contact for a MOS transistor
Assignee: STMicroelectronics lnc USA
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Filing: 1989-03-23
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Granted: —
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Expires: 2009-03-23
Abstract
Abstract A process for forming an MOS transistor with self-aligned contact holes comprises first forming a conductive layer of material over the substrate followed by formation of a capping layer of oxide over the conductive layer. The conductive layer and capping oxide layer are then patterned to form the gate electrode of a transistor with source/drain regions defined on either side thereof. A conformal layer of oxide is then disposed over the substrate and anisotropically etched to remove the oxide layer from the horizontal surfaces leaving a sidewall oxide layer on all substantially vertical surfaces. Thereafter, a second layer of conductive material is deposited over the substrate and patterned to form contacts.
Inventors
- 👤 Tsiu Chiu C/O Sgs-Thomson Microelectronics Chan
- 👤 Yu-Pin C/O Sgs-Thomson Microelectronics Han
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-31 05:04
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/069; H10B; H10B10/00; H10B10/12; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0112; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/0186; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/859; H10W20/071; H10W20/081
Claims Analysis
Total Claims: 25
Claim 1
Independent Claim
251 words
A method for forming contact holes from a first structural level in a semiconductor structure to a second structural level therein, comprising: forming a layer of conductive material at the first structural level; forming a capping layer of insulating material over the layer of conductive material at the first structural level to provide a protective insulating layer thereon, the second structural level above the upper surface of the capping layer; patterning the capping layer and the layer of conductive material to define a predetermined conductive structure having at least one substantially vertical wall; forming a conformal layer of insulating material over the conductive structure at the first structural level; and anisotropically etching the conformal insulating layer in a primarily vertical direction down from the second structural level to the first structural level such that the portion of the conformal insulating layer on the substantially vertical walls of the conductive structure are not removed, the step of anisotropically etching leaving a sidewall layer of insulating material and exposing the surface of the first structural level spaced away from the substantially vertical wall by the thickness of the insulating sidewall layer; wherein the portion of the capping layer remaining on the conductive structure and the insulating sidewall layer electrically insulate the conductive portion of the conductive structure; wherein the outer surfaces of the insulating sidewall layer provide the sidewalls of the contact hole that are spaced from the substantially vertical walls of the capped structure by the thickness of the insulating sidewall layer.
Claim 2
Independent Claim
251 words
A method for forming contact holes from a first structural level in a semiconductor structure to a second structural level therein, comprising: forming a layer of conductive material at the first structural level; forming a capping layer of insulating material over the layer of conductive material at the first structural level to provide a protective insulating layer thereon, the second structural level above the upper surface of the capping layer; patterning the capping layer and the layer of conductive material to define a predetermined conductive structure having at least one substantially vertical wall; forming a conformal layer of insulating material over the conductive structure at the first structural level; and anisotropically etching the conformal insulating layer in a primarily vertical direction down from the second structural level to the first structural level such that the portion of the conformal insulating layer on the substantially vertical walls of the conductive structure are not removed, the step of anisotropically etching leaving a sidewall layer of insulating material and exposing the surface of the first structural level spaced away from the substantially vertical wall by the thickness of the insulating sidewall layer; wherein the portion of the capping layer remaining on the conductive structure and the insulating sidewall layer electrically insulate the conductive portion of the conductive structure; wherein the outer surfaces of the insulating sidewall layer provide the sidewalls of the contact hole that are spaced from the substantially vertical walls of the capped structure by the thickness of the insulating sidewall layer.
Claim 3
Dependent Claim
56 words
The method of Claim 1 wherein the step of patterning the capping layer and the layer of conductive material comprises: defining a pattern on the upper surface of the capping layer of insulating material; and etching the capping layer and layer of conductive material down to the first structural level in accordance with the defined pattern.
Claim 4
Dependent Claim
31 words
The method of Claim 1 wherein the capping layer of insulating material and the conformal layer of insulating material comprise silicon dioxide and the semiconductor structure comprises a silicon base material.
Claim 5
Dependent Claim
18 words
The method of Claim 3 wherein the first structural level is formed on the surface of the substrate.
Claim 6
Dependent Claim
93 words
The method of Claim 4 and further comprising: forming a layer of thick oxide over the substrate; and patterning and etching the thick oxide layer to define isolating portions of the thick oxide layer having substantially vertical walls such that the isolating portions are part of the first structural level; wherein isolating sidewall layers of the conformal layer of insulating material are formed on the substantially vertical walls of the isolating portions to space the contact hole away from the edge of the isolating portion by the thickness of the isolating sidewall layers.
Claim 7
Dependent Claim
39 words
The method of Claim 1 and further comprising: forming a conformal layer of conductive material over the semiconductor substrate after formation of the contact holes; and patterning the layer of conductive material to form contacts in the contact holes.
Claim 8
Dependent Claim
59 words
The method of Claim 1 and further comprising patterning the capping layer of insulating material and removing the patterned portions thereof to selectively expose regions of the layer of conductive material in the first structural level prior to forming the conformal layer of insulating material such that interlevel contact holes are formed to the surface of the conductive structure.
Claim 9
Dependent Claim
45 words
The method of Claim 7 and further comprising: forming a conformal layer of conductive material over the semiconductor substrate after formation of the contact holes; and patterning the layer of conductive material to form contacts in the contact holes and in the interlevel contact holes.
Claim 10
Dependent Claim
261 words
A process for forming contacts from a second, upper structural level to a first, lower structural level in a semiconductor structure, said semiconductor structure including a semiconductor structure substrate, comprising: forming a layer of thick oxide over the semiconductor substrate; patterning the thick oxide layer to define at least one active region on the first level; forming a conductive structure on at least a portion of the surface of the active region, the conductive structure having at least one substantially vertical wall spaced apart from the edges of the thick oxide layer at the boundary of the active region, the conductive structure having a conductive layer and a capping layer of insulating material overlying the conductive layer, the second structural level being above the capping layer; forming a sidewall insulating layer on the subtantially vertical walls of the conductive structure such that the sidewall insulating layer and the capping layer electrically insulate the top and sides of the conductive layer of the conductive structure; forming a conformal layer of conductive material at the second structural level and extending down to the first structural level and contacting the exposed surfaces of the active region; and patterning the conformal layer of conductive material in accordance with a predetermined pattern to form conductive contacts from the second structural level to the first structural level with the outer surfaces of the sidewall insulating layer forming the boundaries of a contact opening and the capping layer of the conductive structure electrically isolating the conductive layer in the conductive structure from the conformal layer of conductive material.
Claim 11
Dependent Claim
261 words
A process for forming contacts from a second, upper structural level to a first, lower structural level in a semiconductor structure, said semiconductor structure including a semiconductor structure substrate, comprising: forming a layer of thick oxide over the semiconductor substrate; patterning the thick oxide layer to define at least one active region on the first level; forming a conductive structure on at least a portion of the surface of the active region, the conductive structure having at least one substantially vertical wall spaced apart from the edges of the thick oxide layer at the boundary of the active region, the conductive structure having a conductive layer and a capping layer of insulating material overlying the conductive layer, the second structural level being above the capping layer; forming a sidewall insulating layer on the subtantially vertical walls of the conductive structure such that the sidewall insulating layer and the capping layer electrically insulate the top and sides of the conductive layer of the conductive structure; forming a conformal layer of conductive material at the second structural level and extending down to the first structural level and contacting the exposed surfaces of the active region; and patterning the conformal layer of conductive material in accordance with a predetermined pattern to form conductive contacts from the second structural level to the first structural level with the outer surfaces of the sidewall insulating layer forming the boundaries of a contact opening and the capping layer of the conductive structure electrically isolating the conductive layer in the conductive structure from the conformal layer of conductive material.
Claim 12
Dependent Claim
83 words
The method of Claim 9 and further comprising: forming a selective opening in the capping layer on the conductive structure to expose the underlying conductive layer in a predetermined region such that the conformal layer contacts the upper surface of the conductive layer in the conductive structure at the selective opening; and patterning the conformal layer of material to provide a contact between the second structural level and the upper surface of the conductive layer in the conductive structure through the selective opening.
Claim 13
Dependent Claim
89 words
The method of Claim 9 wherein the step of forming the active region surrounded by the thick oxide layer comprises: forming a layer of thick oxide to a predetermined thickness on the surface of the substrate; forming a masking layer on the upper surface of the thick oxide layer to define the active region; and selectively removing the portion of the thick oxide layer overlying the active region defined by the mask to form substantially vertical walls in the thick oxide layer at the boundary of the active region.
Claim 14
Dependent Claim
36 words
The method of Claim 11 and further comprising forming a sidewall insulating layer on the substantially vertical walls of the thick oxide layer prior to forming the conformal layer of conductive material at the structural level.
Claim 15
Dependent Claim
161 words
The process of Claim 9 wherein the conductive structure further includes a layer of insulating material disposed between the conductive layer and the surface of the active region, and the conductive structure comprises the gate electrode of a transistor having a substantially vertical surface on a source side of the gate electrode and a substantially vertical surface on the drain side of the gate electrode and further comprising: introducing a light dosage of impurities of the opposite type from the substrate into the surface of the active region on either side of the gate electrode; the step of forming the sidewall insulating layer on the substantially vertical surfaces of the conductive structure comprising forming the sidewall insulating layer on the substantially vertical surfaces of the gate electrode on both the source and the drain side; and introducing a high dose of impurities of the opposite conductivity type from the substrate into the active region on either side of the gate electrode.
Claim 16
Dependent Claim
25 words
The method of Claim 13 wherein the method of introducing the light dosage of impurities and the heavy dosage of impurities comprises ion implantation techniques.
Claim 17
Independent Claim
116 words
The method of Claim9 wherein the step of forming the sidewall insulating layer on the substantially vertical surface of the conductive structure comprises: forming a conformal layer of oxide of a predetermined thickness over the surface of the active region; and anisotropically etching the conformal layer of oxide primarily in the vertical direction for a predetermined amount of time required to remove at least the conformal layer of oxide on the horizontal surfaces, such that the capping layer of insulating material in the conductive structure is not completely removed and the exposed surface active region is spaced apart from the substantially vertical surface of the conductive structure by the thickness of the conformal layer of oxide.
Claim 18
Dependent Claim
85 words
The method of Claim 9 wherein the step of forming the conductive structure comprises: depositing a layer of conductive material over the surface of the active region; forming a layer of insulating material over the conductive layer; patterning the combined conductive layer and insulating material layer to define the conductive structure; and etching the combined conductive layer and insulating material layer to form the conductive structure in accordance with a predetermined conductive structure pattern and the conductive structure having at least one substantially vertical surface.
Claim 19
Dependent Claim
54 words
The method of Claim 16 wherein the step of forming the conductive layer comprises depositing a layer of silicide over the surface of the active region and the step of forming the layer of insulating material comprises depositing a layer of silicon dioxide over the surface of the active region, the substrate being silicon.
Claim 20
Independent Claim
301 words
A method for forming an MOS transistor in an integrated circuit with self-aligned contacts, comprising: forming active regions in a substrate, each active region bounded by a thick insulating layer; forming a layer of gate insulating material over the active region and thick insulating layer; forming a first and conformal layer of conductive material over the surface of the layer of gate insulating material; forming a capping layer of insulating material over the first layer of conductive material; patterning and etching the combined layers of gate insulating material, first layer of conductive material and capping layer of insulating material to form gate electrode in the active region having substantially vertical sidewalls; introducing a light dose of impurities of opposite conductivity type to the conductivity type of the substrate into the active region on both sides of the gate electrode to form lightly doped source/drain region; forming a layer of sidewall insulating material on the substantially vertical sidewalls of the gate electrode to a predetermined thickness; introducing a heavy dose of impurities of a conductivity type opposite to the conductivity type of the substrate into the active region on both sides of the gate electrode to form heavily doped source/drain regions; forming a second and conformal layer of conductive material over the gate electrode, active regions, layers of sidewall insulating layers and thick insulating layer that conforms to the topology of the substrate such that the second layer of conductive material contacts the surface of the active region spaced away from the gate electrode by approximately the thickness of the sidewall insulating material; and patterning and etching the second layer of conductive material in accordance with a predetermined pattern to provide a connective pattern and contacts from a second level above the surface of the substrate to the heavily implanted source/drain regions.
Claim 21
Independent Claim
301 words
A method for forming an MOS transistor in an integrated circuit with self-aligned contacts, comprising: forming active regions in a substrate, each active region bounded by a thick insulating layer; forming a layer of gate insulating material over the active region and thick insulating layer; forming a first and conformal layer of conductive material over the surface of the layer of gate insulating material; forming a capping layer of insulating material over the first layer of conductive material; patterning and etching the combined layers of gate insulating material, first layer of conductive material and capping layer of insulating material to form gate electrode in the active region having substantially vertical sidewalls; introducing a light dose of impurities of opposite conductivity type to the conductivity type of the substrate into the active region on both sides of the gate electrode to form lightly doped source/drain region; forming a layer of sidewall insulating material on the substantially vertical sidewalls of the gate electrode to a predetermined thickness; introducing a heavy dose of impurities of a conductivity type opposite to the conductivity type of the substrate into the active region on both sides of the gate electrode to form heavily doped source/drain regions; forming a second and conformal layer of conductive material over the gate electrode, active regions, layers of sidewall insulating layers and thick insulating layer that conforms to the topology of the substrate such that the second layer of conductive material contacts the surface of the active region spaced away from the gate electrode by approximately the thickness of the sidewall insulating material; and patterning and etching the second layer of conductive material in accordance with a predetermined pattern to provide a connective pattern and contacts from a second level above the surface of the substrate to the heavily implanted source/drain regions.
Claim 22
Dependent Claim
99 words
The method of Claim 18 and wherein the step of forming active regions comprises: forming a layer of thick oxide over the surface of the substrate; patterning and etching the thick oxide layer to remove portions thereof overlying the active regions such that the thick oxide layer at the boundaries of the active region has substantially vertical surfaces; and the step of forming the layer of sidewall insulating material on the substantially vertical surfaces on the gate electrode also forms a sidewall insulating layer on the substantially vertical surfaces of the thick oxide layer after patterning and etching thereof.
Claim 23
Dependent Claim
30 words
The method of Claim 18 wherein the gate insulating material and the capping layer of insulating material are oxide and the first layer of conductive material is doped polycrystalline silicon.
Claim 24
Dependent Claim
107 words
The method of Claim 18 wherein the step of forming the layer of sidewall insulating material comprises: forming a conformal layer of oxide over the gate electrode, active regions and thick insulating layer; and anisotropically etching the conformal layer of oxide to remove portions of the conformal layer of oxide on horizontal surfaces to leave the portions of the conformal layer on vertical surfaces substantially unetched; wherein the step of anisotropically etching is stopped when the thickness of the conformal layer of oxide is removed such that only minimal removal of the portion of the capping layer of insulating material remaining on the gate electrode is removed.
Claim 25
Dependent Claim
60 words
The method of Claim 18 and further comprising: removing a selected region of the capping layer of insulating material to expose the surface of the underlying first layer of conductive material prior to patterning; and forming the gate electrode such that the second layer of conductive material contacts the surface of the layer of conductive material in the selected region.
References Cited (Backward Citations)
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