Voltage-controlled ring oscillator using complementary differential buffers for generating multiple phase signals

Claim 2

A multi-phase voltage-controlled oscillator comprising: a ring of differential buffers; each of said differential buffers having a current control input for regulating current through the differential buffer, a pair of differential outputs, and a pair of differential inputs, at least one of said differential inputs being connected to at least one differential output of a prior one of said differential buffers in said ring; and a control voltage input connected to each of said current control inputs of said differential buffers in said ring for simultaneously adjusting current through all of said differential buffers in said ring in response to a control voltage on said control voltage input; wherein said ring of differential buffers has an even number of said differential buffers, and each of said differential buffers includes: a pair of CMOS inverters, each of said inverters including a PMOS transistor and an NMOS transistor, and each of said inverters having a respective one of said differential inputs and having a respective one of said differential outputs; a PMOS current source transistor sourcing current to both of the CMOS inverters; and an NMOS current sink transistor sinking current from both of the CMOS inverters.

Claim 3

A multi-phase voltage-controlled oscillator comprising: a ring of differential buffers; each of said differential buffers having a current control input for regulating current through the differential buffer, a pair of differential outputs, and a pair of differential inputs, at least one of said differential inputs being connected to at least one differential output of a prior one of said differential buffers in said ring; and a control voltage input connected to each of said current control inputs of said differential buffers in said ring for simultaneously adjusting current through all of said differential buffers in said ring in response to a control voltage on said control voltage input; wherein said ring of differential buffers has an even number of said differential buffers, and each of said differential buffers includes: a pair of CMOS inverters, each of said inverters including a PMOS transistor and an NMOS transistor, and each of said inverters having a respective one of said differential inputs and having a respective one of said differential outputs; a PMOS current source transistor sourcing current to both of the CMOS inverters; and an NMOS current sink transistor sinking current from both of the CMOS inverters; and wherein said multi-phase voltage-controlled oscillator further includes means for avoiding a possibility of a lock-up condition in said ring of differential buffers.

Claim 4

A multi-phase voltage-controlled oscillator comprising: a ring of differential buffers; each of said differential buffers having a current control input for regulating current through the differential buffer, a pair of differential outputs, and a pair of differential inputs, at least one of said differential inputs being connected to at least one differential output of a prior one of said differential buffers in said ring; and a control voltage input connected to each of said current control inputs of said differential buffers in said ring for simultaneously adjusting current through all of said differential buffers in said ring in response to a control voltage on said control voltage input; wherein said ring of differential buffers has an even number of said differential buffers, and each of said differential buffers includes: a pair of CMOS inverters, each of said inverters including a PMOS transistor and an NMOS transistor, and each of said inverters having a respective one of said differential inputs and having a respective one of said differential outputs; a PMOS current source transistor sourcing current to both of the CMOS inverters; and an NMOS current sink transistor sinking current from both of the CMOS inverters; and wherein said multi-phase voltage-controlled oscillator further includes means for avoiding a possibility of a lock-up condition in said ring of differential buffers.

Claim 5

The multi-phase voltage-controlled oscillator as claimed in claim 2, wherein said means for avoiding a possibility of a lock-up condition comprises a threshold bias generator supplying a threshold bias signal to one of the differential inputs of each of said differential buffers in said ring of differential buffers.

Claim 6

The multi-phase voltage-controlled oscillator as claimed in claim 2, wherein said CMOS transistors are standard digital logic CMOS transistors causing said possibility of a lockup condition in said ring of differential buffers.

Claim 7

A multi-phase voltage-controlled oscillator comprising: a ring of differential buffers; each of said differential buffers having a current control input for regulating current through the differential buffer, a pair of differential outputs, and a pair of differential inputs, at least one of said differential inputs being connected to at least one differential output of a prior one of said differential buffers in said ring; and a control voltage input connected to each of said current control inputs of said differential buffers in said ring for simultaneously adjusting current through all of said differential buffers in said ring in response to a control voltage on said control voltage input; wherein said ring of differential buffers has an even number of said differential buffers, and each of said differential buffers includes: a pair of CMOS inverters, each of said inverters including a PMOS transistor and an NMOS transistor, and each of said inverters having a respective one of said differential inputs and having a respective one of said differential outputs; a PMOS current source transistor sourcing current to both of the CMOS inverters; and an NMOS current sink transistor sinking current from both of the CMOS inverters; and wherein said multi-phase voltage-controlled oscillator further includes a threshold bias generator supplying a threshold bias signal to one of the differential inputs of each of said differential buffers in said ring of differential buffers, thereby avoiding a possibility of a lock-up condition in said ring of differential buffers.

Claim 8

A multi-phase voltage-controlled oscillator comprising: a ring of differential buffers; each of said differential buffers having a current control input for regulating current through the differential buffer, a pair of differential outputs, and a pair of differential inputs, at least one of said differential inputs being connected to at least one differential output of a prior one of said differential buffers in said ring; and a control voltage input connected to each of said current control inputs of said differential buffers in said ring for simultaneously adjusting current through all of said differential buffers in said ring in response to a control voltage on said control voltage input; wherein said ring of differential buffers has an even number of said differential buffers, and each of said differential buffers includes: a pair of CMOS inverters, each of said inverters including a PMOS transistor and an NMOS transistor, and each of said inverters having a respective one of said differential inputs and having a respective one of said differential outputs; a PMOS current source transistor sourcing current to both of the CMOS inverters; and an NMOS current sink transistor sinking current from both of the CMOS inverters; and wherein said multi-phase voltage-controlled oscillator further includes a threshold bias generator supplying a threshold bias signal to one of the differential inputs of each of said differential buffers in said ring of differential buffers, thereby avoiding a possibility of a lock-up condition in said ring of differential buffers.

Claim 9

The multi-phase voltage-controlled oscillator as claimed in claim 5, wherein said CMOS transistors are standard digital logic CMOS transistors causing said possibility of a lockup condition in said ring of differential buffers.