Patent US3229350A successfully refreshed from Google Patents.
US4884041A
Expired / Lapsed
US
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Fully integrated high-speed voltage controlled ring oscillator
Assignee: Avago Technologies International Sales Pte Ltd
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Filing: 1987-06-05
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Granted: 1989-11-28
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Expires: 2007-06-05
Abstract
Abstract An N ring element ring oscillator merged with an M element ring oscillator by using a linear combining circuit. By adjusting the control voltage, the oscillation frequency can be varied from 1/2*N*T d (where T d is a gate delay) to 1/2*M*T d . Other embodiments provide extended frequency tuning range.
Inventors
- 👤 Richard C. Walker
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 13:24
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/353; H03K3/354; H03K17/00; H03K17/51; H03K17/56; H03K17/60; H03K17/62; H03K17/6257; H03K17/6264; H03K17/687; H03K17/693; H03K3/027; H03K3/03; H03K3/0315; H03K3/0322
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
113 words
A ring oscillator comprising: an inverter/combination element having a pair of inputs and an output; a first delay element having an input connected to the output of the inverter/combination element and having an output; a second delay element having an input connected to the output of the first delay element and having an output connected to a first one of the inputs of the inverter/conbination element; a third delay element having an input connected to the output of the first delay element and having an output connected to a second of the inputs of the inverter/conbination element; and an output port connected to any internal connection between the other elements of this oscillator.
Claim 2
Dependent Claim
113 words
A ring oscillator comprising: an inverter/combination element having a pair of inputs and an output; a first delay element having an input connected to the output of the inverter/combination element and having an output; a second delay element having an input connected to the output of the first delay element and having an output connected to a first one of the inputs of the inverter/conbination element; a third delay element having an input connected to the output of the first delay element and having an output connected to a second of the inputs of the inverter/conbination element; and an output port connected to any internal connection between the other elements of this oscillator.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-11-27 | 1993-05-29 | 1993-11-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-11-27 | 1997-05-29 | 1997-11-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-11-27 | 2001-05-29 | 2001-11-28 | $7700.00 | Window Closed / Lapsed |