US5036216A
Expired / Lapsed
US
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Video dot clock generator
Assignee: Renesas Electronics America Inc
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Filing: 1990-03-08
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Granted: 1991-07-30
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Expires: 2010-03-08
Abstract
Abstract A video dot clock generator includes a phase-locked loop (PLL) which includes a voltage controlled oscillator, a frequency divider, a phase comparator and a loop filter. The voltage controlled oscillator (VCO) is programmable to provide multiple frequency ranges for a given range of control voltages applied to the oscillator. The programming affects both the frequency range and the gain of the VCO. The phase comparator includes circuitry which simulates a predetermined minimum phase error which, when compensated for, substantially eliminates jitter in the dot clock signal. The frequency divider used in the PLL and a similar frequency divided used to generate the reference signals for the phase comparator are programmable via an internal memory which also holds programmable control signals for the VCO. The memory, in turn, may be programmed by the user to achieve desired frequency and loop again characteristics for a given application.
Inventors
- 👤 Jere W. Hohmann
- 👤 Bruce J. Rogers
- 👤 Stephen A. Ransom
- 👤 Daniel M. Clementi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 09:28
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/085; H03L7/089; H03L7/0891; H03K; H03K3/00; H03K3/02; H03K3/353; H03K3/354; H03L7/099; H03L7/0995; H03L7/16; H03L7/18; H03L7/183; H03L7/187; H03L7/193; H03L7/197; H03L7/199; H03K5/00; H03K2005/00013; H03K2005/00019; H03K2005/00058; H03K2005/00071; H03L2207/00; H03L2207/06
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
184 words
Apparatus for use in generating multiple clock signals, comprising: a source of reference oscillatory signal; first frequency dividing means for dividing said reference oscillatory signal in frequency by an amount determined by a first control signal; variable oscillator means having a control input terminal and responsive to a second control signal applied thereto for generating a variable frequency oscillatory signal; second frequency dividing means for dividing said variable frequency oscillatory signal, in frequency, by an amount determined by a third control signal; phase comparison means for producing an output signal representing the difference in phase between the respective output signals of said first and second frequency dividing means and being responsive to a fourth control signal for producing said output signal indicating no difference in phase, irrespective of the output signals of said first and second frequency dividing means; means coupling the output signal of said phase comparison means to the control input terminal of said variable oscillator means; and control means, for generating said first, third and fourth control signals to change the frequency of the signal provided by said variable oscillator means.
Claim 2
Dependent Claim
184 words
Apparatus for use in generating multiple clock signals, comprising: a source of reference oscillatory signal; first frequency dividing means for dividing said reference oscillatory signal in frequency by an amount determined by a first control signal; variable oscillator means having a control input terminal and responsive to a second control signal applied thereto for generating a variable frequency oscillatory signal; second frequency dividing means for dividing said variable frequency oscillatory signal, in frequency, by an amount determined by a third control signal; phase comparison means for producing an output signal representing the difference in phase between the respective output signals of said first and second frequency dividing means and being responsive to a fourth control signal for producing said output signal indicating no difference in phase, irrespective of the output signals of said first and second frequency dividing means; means coupling the output signal of said phase comparison means to the control input terminal of said variable oscillator means; and control means, for generating said first, third and fourth control signals to change the frequency of the signal provided by said variable oscillator means.
Claim 3
Dependent Claim
37 words
The apparatus set forth in claim 1 wherein said control means includes a programmable memory for holding values of said first, third and fourth control signals and said apparatus further includes means for programming said programmable memory.
Claim 4
Dependent Claim
96 words
The apparatus set forth in claim 1 wherein: said first control signal includes first and second component control signals; and said first frequency dividing means includes; prescaling means, responsive to said first component signal, for selectively dividing said variable frequency oscillatory signal in frequency by a factor of two to produce a pulse output signal; and signal pulse counting means, responsive to said second component control signal, for producing one output pulse for every integer N pulses of the signal provided by said prescaling means, where N is the value of said second component control signal.
Claim 5
Dependent Claim
64 words
The apparatus set forth in claim 1 further including means for coupling said apparatus to a source of operating potential and to a source of reference potential, wherein said phase comparison means is responsive to a further control signal being in first and second states to produce said output signal referenced to said source of operating potential and said source of reference potential, respectively.
Claim 6
Dependent Claim
26 words
The apparatus set forth in claim 1 further including amplifier means, configured to be selectively coupled between said phase comparison means and said variable oscillator means.
Claim 7
Dependent Claim
183 words
Apparatus for use in generating multiple clock signals, comprising: a source of reference oscillatory signal; variable oscillator means, having a control input terminal and responsive to a frequency control signal applied thereto for generating a variable frequency oscillatory signal; phase comparison means for producing an output signal representing a variance from a predetermined phase relationship between said reference oscillatory signal and said variable oscillatory signal, said phase comparison means comprising: phase detecting means for producing a first pulse signal having a pulse width representing the difference in time between the occurrence of corresponding predetermined transitions of said reference oscillatory signal and said variable oscillatory signal, respectively; means, responsive to one of said reference oscillatory signal and said variable oscillatory signal for producing a second pulse signal having a substantially fixed pulse width on the occurrence of the predetermined transition of said one signal; and means for combining said first and second pulse signals in a manner allowing said second pulse signal to substantially cancel said first pulse signal when said reference oscillatory signal and said variable oscillatory are in said predetermined phase relationship.
Claim 8
Dependent Claim
183 words
Apparatus for use in generating multiple clock signals, comprising: a source of reference oscillatory signal; variable oscillator means, having a control input terminal and responsive to a frequency control signal applied thereto for generating a variable frequency oscillatory signal; phase comparison means for producing an output signal representing a variance from a predetermined phase relationship between said reference oscillatory signal and said variable oscillatory signal, said phase comparison means comprising: phase detecting means for producing a first pulse signal having a pulse width representing the difference in time between the occurrence of corresponding predetermined transitions of said reference oscillatory signal and said variable oscillatory signal, respectively; means, responsive to one of said reference oscillatory signal and said variable oscillatory signal for producing a second pulse signal having a substantially fixed pulse width on the occurrence of the predetermined transition of said one signal; and means for combining said first and second pulse signals in a manner allowing said second pulse signal to substantially cancel said first pulse signal when said reference oscillatory signal and said variable oscillatory are in said predetermined phase relationship.
Claim 9
Dependent Claim
80 words
The apparatus set forth in claim 6 wherein: said phase detector produces said first pulse signal when the phase of said variable oscillatory signal lags the phase of said reference oscillatory signal, and produces a third pulse signal when the phase of said variable oscillatory signal leads the phase of said reference oscillatory signal; and said means for combining includes means for combining said third pulse signal with said first and second pulse signals to produce said combined output signal.
Claim 10
Dependent Claim
30 words
The apparatus set forth in claim 6 wherein said phase detector is a type IV frequency-phase detector and said means for producing said second pulse signal includes a monostable multivibrator.
Claim 11
Dependent Claim
105 words
Apparatus for use ian generating multiple-clock signals, comprising: a source of reference oscillatory signal; variable oscillator means, having a control input terminal and responsive to a frequency control signal applied thereto for generating a variable frequency oscillatory signal, said variable oscillator means including further means, responsive to a further control signal, for changing the range of frequencies of the variable oscillatory signal that are produced in response to a predetermined range of values of said frequency control signal; and phase comparison means for producing an output signal representing a variance from a predetermined phase relationship between said reference oscillatory signal and said variable oscillatory signal.
Claim 12
Dependent Claim
105 words
Apparatus for use ian generating multiple-clock signals, comprising: a source of reference oscillatory signal; variable oscillator means, having a control input terminal and responsive to a frequency control signal applied thereto for generating a variable frequency oscillatory signal, said variable oscillator means including further means, responsive to a further control signal, for changing the range of frequencies of the variable oscillatory signal that are produced in response to a predetermined range of values of said frequency control signal; and phase comparison means for producing an output signal representing a variance from a predetermined phase relationship between said reference oscillatory signal and said variable oscillatory signal.
Claim 13
Dependent Claim
53 words
The apparatus set forth in claim 9 wherein: said variable oscillator means includes a current controlled oscillator; and said means responsive to said further control signal includes means for changing the amount of current provided to said current controlled oscillator in response to the predetermined range of values of said frequency control signal.
Claim 14
Dependent Claim
77 words
The apparatus set forth in claim 10 wherein: said variable oscillator means has a gain which exhibits a first functional relationship with respect to the frequency of said variable oscillatory signal; and the means for changing the range of frequencies of the variable oscillatory signal in response to said further control signal also changes the gain of said variable oscillator means to have a second functional relationship with respect to the frequency of said variable oscillatory signal.
Claim 15
Dependent Claim
88 words
The apparatus set forth in claim 9 wherein: said variable oscillator means includes a current controlled ring oscillator which includes a plurality of inverter circuits each including a metal-insulator-semiconductor (MIS) transistor having a principle conduction path between first and second electrodes and a third electrode for controlling the conductivity of said principle conduction path; and said further means includes means for changing the operating characteristics of each of said transistors by changing the capacitance between said third electrode and at least one of said first and second electrodes.
Claim 16
Independent Claim
128 words
A method for generating a signal representing a variance from a predetermined phase relationship between a reference oscillatory signal and a variable oscillatory signal comprising the steps of: producing a first pulse signal having a pulse width representing the difference in time between the occurrence of corresponding predetermined transitions of said reference oscillatory signal and said variable oscillatory signal, respectively; producing a second pulse signal having a substantially fixed pulse width on the occurrence of a predetermined transition of one of said reference oscillatory signal and said variable oscillatory signal; and combining said first and second pulse signals in a manner allowing said second pulse signal to substantially cancel said first pulse signal when said reference oscillatory signal and said variable oscillator are in said predetermined phase relationship.
Claim 17
Independent Claim
128 words
A method for generating a signal representing a variance from a predetermined phase relationship between a reference oscillatory signal and a variable oscillatory signal comprising the steps of: producing a first pulse signal having a pulse width representing the difference in time between the occurrence of corresponding predetermined transitions of said reference oscillatory signal and said variable oscillatory signal, respectively; producing a second pulse signal having a substantially fixed pulse width on the occurrence of a predetermined transition of one of said reference oscillatory signal and said variable oscillatory signal; and combining said first and second pulse signals in a manner allowing said second pulse signal to substantially cancel said first pulse signal when said reference oscillatory signal and said variable oscillator are in said predetermined phase relationship.
Claim 18
Dependent Claim
219 words
Apparatus for use in generating multiple clock signals, comprising: a source of reference oscillatory signal; first frequency dividing means for dividing said reference oscillatory signal in frequency by an amount determined by a first control signal; variable oscillator means, having a control input terminal and responsive to a second control signal applied thereto for generating a variable frequency oscillatory signal; second frequency dividing means for dividing said variable frequency oscillatory signal, in frequency, by an amount determined by a third control signal; phase comparison means for producing an output signal representing the difference in phase between the respective output signals of said first and second frequency dividing means and being responsive to a fourth control signal to produce said output signal indicating no difference in phase, irrespective of the output signals of said first and second frequency dividing means; filter means for generating said second control signal from the output signal of said phase comparison means and for applying said second control signal to the control input terminal of said variable oscillator means; and control means, for generating said first, third and fourth control signals to change the frequency of the signal provided by said variable oscillator means, holding values of said first, third and fourth control signals; wherein said apparatus further includes means for programming said programmable memory.
Claim 19
Dependent Claim
219 words
Apparatus for use in generating multiple clock signals, comprising: a source of reference oscillatory signal; first frequency dividing means for dividing said reference oscillatory signal in frequency by an amount determined by a first control signal; variable oscillator means, having a control input terminal and responsive to a second control signal applied thereto for generating a variable frequency oscillatory signal; second frequency dividing means for dividing said variable frequency oscillatory signal, in frequency, by an amount determined by a third control signal; phase comparison means for producing an output signal representing the difference in phase between the respective output signals of said first and second frequency dividing means and being responsive to a fourth control signal to produce said output signal indicating no difference in phase, irrespective of the output signals of said first and second frequency dividing means; filter means for generating said second control signal from the output signal of said phase comparison means and for applying said second control signal to the control input terminal of said variable oscillator means; and control means, for generating said first, third and fourth control signals to change the frequency of the signal provided by said variable oscillator means, holding values of said first, third and fourth control signals; wherein said apparatus further includes means for programming said programmable memory.
Claim 20
Dependent Claim
42 words
The apparatus of claim 14, wherein said filter means includes amplifier means, configured to be selectively coupled between said phase comparison means and said variable oscillator means, for generating said second control signal from the output signal of said phase comparison means.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-07-29 | 1995-01-28 | 1995-07-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-07-29 | 1999-01-28 | 1999-07-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-07-29 | 2003-01-28 | 2003-07-30 | $7700.00 | Window Closed / Lapsed |