Adjustable frequency signal generator system with incremental control

Claim 1

A system receiving and storing data at an input clock frequency, and applying the stored data at an adjustable output clock frequency, comprising: first and second memory means for receiving said data at said input clock, storing said data, and applying said data therefrom at said output clock; switch means for transmitting said data at said input clock for storage in one of said first and second memory means, while transmitting stored data from the other one of said first and second memory means at said output clock; means coupled to said first and second memory means, respectively, to indicate when a predetermined amount of said stored data has been applied therefrom, and to provide responsively a memory switching signal; said switch means being further coupled to receive said memory switching signal and to responsively switch between said first and second memory means; stable oscillator means providing an oscillating signal having a selected fixed frequency; frequency divider means having an adjustable dividing ration, for receiving said oscillating signal, and for providing a frequency divided output signal, corresponding to said output clock; means for detecting said output clock frequency with respect to a reference signal, and for providing a first control signal when said detected frequency is higher than a predetermined multiple of said reference signal frequency, and a second control signal when said detected frequency is lower; and dividing ratio adjustment means for receiving said first and second control signal and for adjusting responsively said dividing ratio of said frequency dividing means to change the frequency of said output clock to substantially correspond to said predetermined multiple of said reference signal frequency.

Claim 2

A system receiving and storing data at an input clock frequency, and applying the stored data at an adjustable output clock frequency, comprising: first and second memory means for receiving said data at said input clock, storing said data, and applying said data therefrom at said output clock; switch means for transmitting said data at said input clock for storage in one of said first and second memory means, while transmitting stored data from the other one of said first and second memory means at said output clock; means coupled to said first and second memory means, respectively, to indicate when a predetermined amount of said stored data has been applied therefrom, and to provide responsively a memory switching signal; said switch means being further coupled to receive said memory switching signal and to responsively switch between said first and second memory means; stable oscillator means providing an oscillating signal having a selected fixed frequency; frequency divider means having an adjustable dividing ration, for receiving said oscillating signal, and for providing a frequency divided output signal, corresponding to said output clock; means for detecting said output clock frequency with respect to a reference signal, and for providing a first control signal when said detected frequency is higher than a predetermined multiple of said reference signal frequency, and a second control signal when said detected frequency is lower; and dividing ratio adjustment means for receiving said first and second control signal and for adjusting responsively said dividing ratio of said frequency dividing means to change the frequency of said output clock to substantially correspond to said predetermined multiple of said reference signal frequency.

Claim 6

A system for receiving data recovered from a magnetic recording medium by a magnetic transducer mounted on a rotating scanner drum, said system receiving said data at a first clock rate, storing said data in a memory, and outputting said stored data from said memory at a second clock rate which is substantially lower than said first clock rate, comprising: first and second memory means coupled to receive and store said recovered data at said first clock rate; switch means coupled to transmit said recovered data at said first clock rate to one of said first and second memory means, respectively, and to transmit a second clock signal of said second rate to the other one of said memory means, for outputting stored data therefrom, said switch means being further coupled to switch said respective signals transmitted thereby between said first and second memory means in response to a memory switching signal indicating a predetermined level of fullness of one said memory means; means for detecting occurrence of said memory switching signal with respect to a reference signal derived from a rotation of said scanner; oscillator means providing an oscillating output signal having a selected fixed frequency; frequency divider means having an adjustable dividing ratio, coupled to receive said output signal provided by said oscillator means and to provide a frequency divided output signal having a nominal frequency corresponding to said second clock rate; means responsive to said detecting means and coupled to said frequency divider means for increasing said dividing ratio thereof in response to an early occurrence of said memory switching signal, and for decreasing said dividing ratio in response to a late occurrence of said memory switching signal with respect to said reference signal; and wherein said frequency divided output signal is applied to said switch means as said second clock signal.

Claim 7

A system for receiving data recovered from a magnetic recording medium by a magnetic transducer mounted on a rotating scanner drum, said system receiving said data at a first clock rate, storing said data in a memory, and outputting said stored data from said memory at a second clock rate which is substantially lower than said first clock rate, comprising: first and second memory means coupled to receive and store said recovered data at said first clock rate; switch means coupled to transmit said recovered data at said first clock rate to one of said first and second memory means, respectively, and to transmit a second clock signal of said second rate to the other one of said memory means, for outputting stored data therefrom, said switch means being further coupled to switch said respective signals transmitted thereby between said first and second memory means in response to a memory switching signal indicating a predetermined level of fullness of one said memory means; means for detecting occurrence of said memory switching signal with respect to a reference signal derived from a rotation of said scanner; oscillator means providing an oscillating output signal having a selected fixed frequency; frequency divider means having an adjustable dividing ratio, coupled to receive said output signal provided by said oscillator means and to provide a frequency divided output signal having a nominal frequency corresponding to said second clock rate; means responsive to said detecting means and coupled to said frequency divider means for increasing said dividing ratio thereof in response to an early occurrence of said memory switching signal, and for decreasing said dividing ratio in response to a late occurrence of said memory switching signal with respect to said reference signal; and wherein said frequency divided output signal is applied to said switch means as said second clock signal.