Digital integrated circuit propagation delay time controller

Claim 1

A circuit for monitoring and controlling the propagation delay of logic elements on an integrated circuit comprising: an oscillator having N logic elements of the integrated circuit connected in series to form a ring with the output of each logic element being connected to the input of the succeeding logic element such that a pulse continuously circulates around the ring, the oscillator logic elements having propagation delay characteristics typical of the other logic elements on the integrated circuit, the output of the oscillator being a phase locking signal having a frequency which is a function of the propagation delay of each logic element of the ring, the propagation delay of the logic elements being in part a function of applied bias voltage; and a bias signal generator, having as inputs the phase locking signal and a reference signal having a plurality of pulses of frequency Fref, for comparing the phase locking signal to the reference signal to generate a bias signal proportional to the time integral of the phase difference between the phase locking signal and the reference signal, the bias signal being applied to each logic element on the integrated circuit to automatically control the propagation delay of each logic element to be 1/(N×Fref), the logic elements having similar propagation delay times for a given applied bias signal.