Wideband digital frequency discriminator and phase and frequency detector

Claim 2

A wideband digital discriminator for demodulating an FM signal comprising: (a) timing means for producing a reference signal of known frequency; (b) counting means operative at the rate of the FM signal for generating at the output thereof a cyclical signal comprising a repeated series of nonambiguous states; (c) means for sampling the state of the cyclical signal generated at the output of said counting means at a rate determined by said reference signal and for storing at least two consecutive sampled states of said cyclical signal; and (d) detection means operating at a rate determined by said reference signal and connected to receive said stored sampled states for detecting a state difference between the sampled states of said cyclical signal, said detection means generating an output signal when a state difference is detected.

Claim 3

The discriminator recited in claim 1 wherein said detection means detects the direction of said state difference and said direction information is included in said output signal.

Claim 4

The discriminator recited in claim 1 wherein said counting means is a Johnson counter.

Claim 5

The discriminator recited in claim 1 wherein said output signal is pulsed and including analog integration means connected to receive said output signal and generate an analog discrimination output signal therefrom.

Claim 6

The discriminator recited in claim 1 wherein said stored sampled states are stored in a first latch connected to receive said cyclical signal from said counting means and a second latch connected to receive the stored cyclical signal from said first latch.

Claim 7

The discriminator recited in claim 1 including means for translating the output signal states of said counting means into a binary coded signal.

Claim 8

The discriminator recited in claim 1 including means connected to receive the cyclical state output signal of said counting means and generate a state signal advanced by a predetermined number of states from said state output of said counting means, said advanced state signal transmitted to said detection means.

Claim 9

A digital discriminator for demodulating an FM signal comprising: (a) means for producing a reference signal having a period which is related to the period of the center frequency of the FM signal; (b) counting means operative at the rate of the FM signal for generating at the output thereof a cyclical signal comprising a repeated series of nonambiguous states; (c) means for sampling the state of the cyclical signal generated at the output of said counting means at a rate determined by said reference signal and for storing at least two consecutive sampled states of said cyclical signal; and (d) detection means operating at a rate determined by said reference signal and connected to receive said stored sampled states for detecting a state difference between the sampled states of said cyclical signal, said detection means generating an output signal when a state difference is detected.

Claim 10

A digital discriminator for demodulating an FM signal comprising: (a) means for producing a reference signal having a period which is related to the period of the center frequency of the FM signal; (b) counting means operative at the rate of the FM signal for generating at the output thereof a cyclical signal comprising a repeated series of nonambiguous states; (c) means for sampling the state of the cyclical signal generated at the output of said counting means at a rate determined by said reference signal and for storing at least two consecutive sampled states of said cyclical signal; and (d) detection means operating at a rate determined by said reference signal and connected to receive said stored sampled states for detecting a state difference between the sampled states of said cyclical signal, said detection means generating an output signal when a state difference is detected.

Claim 11

A digital discriminator as recited in claim 8 including means connected to receive the state output of said counting means and generate a state signal advanced by a predetermined number of states from said state output of said counting means, said advanced state signal transmitted to said detection means.

Claim 12

A digital discriminator for demodulating an FM signal comprising: (a) a counter operating at the frequency of the FM signal for generating a cyclical output signal comprising a predetermined number of sequential nonambiguous states; (b) means for generating a reference signal; (c) first and second latches for storing states of said cyclical signal, said first latch actuated synchronously with said reference signal for sampling and storing the present state of said cyclical signal, said second latch actuated synchronously with said reference signal for sampling and storing the state signal stored in said first latch to obtain the immediately preceding sampled state of said cyclical signal; and (d) detection means actuated synchronously with said reference signal and connected to receive the state signal stored in said first latch and said second latch, said detection means generating an output signal when the two state signals received by said detection means are different.

Claim 13

A digital discriminator for demodulating an FM signal comprising: (a) a counter operating at the frequency of the FM signal for generating a cyclical output signal comprising a predetermined number of sequential nonambiguous states; (b) means for generating a reference signal; (c) first and second latches for storing states of said cyclical signal, said first latch actuated synchronously with said reference signal for sampling and storing the present state of said cyclical signal, said second latch actuated synchronously with said reference signal for sampling and storing the state signal stored in said first latch to obtain the immediately preceding sampled state of said cyclical signal; and (d) detection means actuated synchronously with said reference signal and connected to receive the state signal stored in said first latch and said second latch, said detection means generating an output signal when the two state signals received by said detection means are different.

Claim 14

The discriminator recited in claim 10 including an integrator for receiving the output signal of said detection means and generating an analog output signal proportional to the frequency deviation of said FM signal.

Claim 15

The discriminator recited in claim 10 wherein the output signal of said detection means indicates the direction of the change in said state signals received by said detection means.

Claim 16

The discriminator recited in claim 10 wherein said counter is a Johnson divide-by-four counter.

Claim 17

The discriminator recited in claim 10 including means connected between said first latch and said detection means for translating the state signal from said first latch into binary code.

Claim 18

A discriminator as recited in claim 10 wherein said detection means includes a first output port and a second output port, said detection means generating a pulse on said first port when an increasing state difference is detected and generating a pulse on said second port when a decreasing state difference is detected.

Claim 19

A discriminator as recited in claim 15 including a resistor-capacitor integrator connected to said first and second ports for charging said capacitor by said pulses to produce an analog output signal proportional to the frequency deviation of said FM signal.

Claim 20

A digital discriminator for demodulating an FM signal comprising: (a) a counter operating at the frequency of the FM signal for generating a cyclical output signal comprising a predetermined number of sequential nonambiguous states; (b) means for generating a reference signal; (c) first and second latches for storing states of said cyclical signal, said first latch actuated synchronously with said reference signal for sampling and storing the present state of said cyclical signal, said second latch actuated synchronously with said reference signal for sampling and storing the state signal stored in said first latch to obtain the immediately preceding sampled state of said cyclical signal; (d) means for receiving the state signal stored in said first latch and generating a state signal corresponding to a state of said sequential nonambiguous states advanced by a predetermined number of states from the state received from said first latch; and (e) detection means actuated synchronously with said reference signal and connected to receive the state signal stored in said second latch and the advanced state signal generated by said means for receiving, said detection means generating an output signal when the two state signals received by said detection means are different, said output signal indicating whether said state change is increasing or decreasing.

Claim 21

A digital discriminator for demodulating an FM signal comprising: (a) a counter operating at the frequency of the FM signal for generating a cyclical output signal comprising a predetermined number of sequential nonambiguous states; (b) means for generating a reference signal; (c) first and second latches for storing states of said cyclical signal, said first latch actuated synchronously with said reference signal for sampling and storing the present state of said cyclical signal, said second latch actuated synchronously with said reference signal for sampling and storing the state signal stored in said first latch to obtain the immediately preceding sampled state of said cyclical signal; (d) means for receiving the state signal stored in said first latch and generating a state signal corresponding to a state of said sequential nonambiguous states advanced by a predetermined number of states from the state received from said first latch; and (e) detection means actuated synchronously with said reference signal and connected to receive the state signal stored in said second latch and the advanced state signal generated by said means for receiving, said detection means generating an output signal when the two state signals received by said detection means are different, said output signal indicating whether said state change is increasing or decreasing.

Claim 22

The discriminator recited in claim 17 including an integrator for receiving the output signal of said detection means and generating an analog output signal proportional to the frequency deviation of said FM signal.

Claim 23

The discriminator recited in claim 17 wherein said counter is a Johnson divide-by-four counter.

Claim 24

The discriminator recited in claim 17 wherein said means for receiving is a modulofour adder for adding a predetermined number to the state signal received from said first latch.

Claim 25

The discriminator recited in claim 17 including means connected between said first latch and said means for receiving for translating the state signal in said first latch into binary code.

Claim 26

A discriminator as recited in claim 17 wherein said detection means includes a first output port and a second output port, said detection means generating a pulse on said first port when an increasing state difference is detected and generating a pulse in said second port when a decreasing state difference is detected.

Claim 27

A discriminator as recited in claim 22 including a resistor-capacitor integrator connected to said first and second ports for charging said capacitor by said pulses to produce an analog output signal proportional to the frequency deviation of said FM signal.

Claim 28

A wideband digital discriminator for demodulating an FM signal comprising: (a) a ring counter for generating in synchronism with the FM signal a cyclical signal having recurring X number of sequential nonambiguous states; (b) means for generating a reference signal where K is the ratio of the center frequency of the FM signal to the frequency of the reference signal; (c) means for sampling the state of said cyclical signal in synchronism with said reference signal and for storing the present and immediately preceding sampled state of said cyclical signal; (d) means for generating an advanced state signal having a state of said nonambiguous states advanced N states ahead of said present sampled cyclical state where N+K=X; (e) means for detecting a state difference between said advanced state and said preceding state; and (f) means for generating an output signal when a state difference is detected.

Claim 29

A wideband digital discriminator for demodulating an FM signal comprising: (a) a ring counter for generating in synchronism with the FM signal a cyclical signal having recurring X number of sequential nonambiguous states; (b) means for generating a reference signal where K is the ratio of the center frequency of the FM signal to the frequency of the reference signal; (c) means for sampling the state of said cyclical signal in synchronism with said reference signal and for storing the present and immediately preceding sampled state of said cyclical signal; (d) means for generating an advanced state signal having a state of said nonambiguous states advanced N states ahead of said present sampled cyclical state where N+K=X; (e) means for detecting a state difference between said advanced state and said preceding state; and (f) means for generating an output signal when a state difference is detected.

Claim 30

Apparatus for measuring the phase and frequency difference between an FM signal and a reference signal comprising: (a) counting means operating at the frequency of the FM signal for generating at the output thereof a cyclical signal having a recurring series of nonambiguous states; (b) means for generating a reference signal having a known frequency; (c) means for sampling the state of the cyclical signal generated at the output of said counting means at a rate determined by said reference signal and for storing the present sampled state and immediately preceding sampled state; (d) detection means operating at a rate determined by said reference signal and connected to receive said stored sampled states for detecting a state change between said stored sampled states and the direction of said change, said detection means generating an output signal which indicates the detection of a state change and the direction thereof; (e) means for detecting the phase difference between the FM signal and the reference signal and generating a phase signal proportional to said phase difference; and (f) means for summing said output signal and said phase signal to produce a phase and frequency difference signal representing the phase and frequency difference between the FM signal and the reference signal.

Claim 31

Apparatus for measuring the phase and frequency difference between an FM signal and a reference signal comprising: (a) counting means operating at the frequency of the FM signal for generating at the output thereof a cyclical signal having a recurring series of nonambiguous states; (b) means for generating a reference signal having a known frequency; (c) means for sampling the state of the cyclical signal generated at the output of said counting means at a rate determined by said reference signal and for storing the present sampled state and immediately preceding sampled state; (d) detection means operating at a rate determined by said reference signal and connected to receive said stored sampled states for detecting a state change between said stored sampled states and the direction of said change, said detection means generating an output signal which indicates the detection of a state change and the direction thereof; (e) means for detecting the phase difference between the FM signal and the reference signal and generating a phase signal proportional to said phase difference; and (f) means for summing said output signal and said phase signal to produce a phase and frequency difference signal representing the phase and frequency difference between the FM signal and the reference signal.

Claim 32

Apparatus as recited in claim 25 wherein said output signal has a pulse format and an up/down counter receives the output signal and generates a count output which is provided to a digital-to-analog converter that generates an analog frequency difference signal which is summed in a summing circuit with the phase signal to produce the phase and frequency difference signal.

Claim 33

Apparatus as recited in claim 25 including means connected to receive said stored sampled states for translating the states of said stored sampled states into binary code for transfer to said detection means.

Claim 34

Apparatus as recited in claim 25 including means connected to receive one of said stored sampled states for advancing the state thereof and transferring the advanced state to said detection means.

Claim 37

The method recited in claim 29 wherein the step of comparing includes detecting the direction of the change of state and the step of generating an output signal includes designating the direction of the change of state in the output signal.

Claim 38

The method recited in claim 29 wherein the step of generating a cyclical signal comprises generating a four state Johnson code.

Claim 39

The method recited in claim 29 wherein the step of generating an output signal comprises generating pulses on first and second ports and integrating these pulses to produce an analog signal proportional to the frequency deviation of said FM signal.

Claim 40

The method recited in claim 29 including the step of translating the states of said sampled cyclical signal into binary code for use in said step of comparing.

Claim 41

The method recited in claim 29 including the step of advancing the state of said sampled cyclical signal by a predetermined number of states and the step of comparing comprises detecting a state difference between the immediately preceding sampled state and the advanced state of said cyclical signal.

Claim 42

The method recited in claim 29 wherein the period of said reference signal is related to the period of the center frequency of said FM signal.

Claim 45

A method as recited in claim 36 wherein said output signal is generated in a pulse format, said pulsed output signal is counted in an up/down counter to produce a digital output which is converted to an analog frequency difference signal which is summed with said phase signal to produce said phase and frequency difference signal.