US4697112A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Current-mirror type sense amplifier
Assignee: Toshiba Corp
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Filing: 1986-06-25
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Granted: 1987-09-29
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Expires: 2006-06-25
Abstract
Abstract There is disclosed a sense amplifier characterized by comprising a pull-up circuit. The pull-up circuit comprises a first transistor arranged between the first of a pair of output nodes and a pull-up power source potential node, and a second transistor arranged between the second of the pair of output nodes and the pull-up power source potential node. The gate of the first transistor is connected to the second output node and the gate of the second transistor is connected to the first output node.
Inventors
- 👤 Takayuki Ohtani
- 👤 Mitsuo Isobe
- 👤 Akira Aono
- 👤 Nobuaki Urakawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 00:51
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/45; H03F3/45071; H03F3/45076; H03F3/45179; H03F3/45183; H03K; H03K3/00; H03K3/02; H03K3/353; H03K3/356; H03K3/356104; H03F2203/00; H03F2203/45; H03F2203/45394; H03F2203/45466; H03F2203/45644; H03F2203/45674; H03F2203/45726
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
306 words
A current-mirror type sense amplifier comprising: first and second input terminals; first and second output terminals; a first power source node connected to a first power source potential; a second power source node connected to a second power source potential; a pull-up node connected to a pull-up potential; a differential amplifier for amplifying an input signal between said first and second input terminals to create a potential difference between said first and second output terminals, said differential amplifier including first and second MOS transistors of a first conductivity type, said first MOS transistor having a gate connected to said first input terminal and a drain-source path coupled between said second power source node and said first output terminal, and said second MOS transistor having a gate connected to said second input terminal and a drain-source path coupled between said second power source node and said second output terminal; a current-mirror type load circuit comprising third and fourth MOS transistors of a second conductivity type, said third and fourth MOS transistor having gates connected to each other and to said first output terminal, said third MOS transistor having a drain-source path coupled between said first power source node and said first output terminal, and said fourth MOS transistor having a drain-source path coupled between said first power source node and said second output terminal; and pull-up circuit means for increasing the potential difference between said output terminals, said pull-up circuit means including fifth and sixth MOS transistors of said second conductivity type, said fifth MOS transistor having a gate connected to said second output terminal and a drain-source path coupled between said pull-up node and said first output terminal, and said sixth MOS transistor having a gate connected to said first output terminal and a drain-source path coupled between said pull-up node and said second output terminal.
Claim 2
Dependent Claim
306 words
A current-mirror type sense amplifier comprising: first and second input terminals; first and second output terminals; a first power source node connected to a first power source potential; a second power source node connected to a second power source potential; a pull-up node connected to a pull-up potential; a differential amplifier for amplifying an input signal between said first and second input terminals to create a potential difference between said first and second output terminals, said differential amplifier including first and second MOS transistors of a first conductivity type, said first MOS transistor having a gate connected to said first input terminal and a drain-source path coupled between said second power source node and said first output terminal, and said second MOS transistor having a gate connected to said second input terminal and a drain-source path coupled between said second power source node and said second output terminal; a current-mirror type load circuit comprising third and fourth MOS transistors of a second conductivity type, said third and fourth MOS transistor having gates connected to each other and to said first output terminal, said third MOS transistor having a drain-source path coupled between said first power source node and said first output terminal, and said fourth MOS transistor having a drain-source path coupled between said first power source node and said second output terminal; and pull-up circuit means for increasing the potential difference between said output terminals, said pull-up circuit means including fifth and sixth MOS transistors of said second conductivity type, said fifth MOS transistor having a gate connected to said second output terminal and a drain-source path coupled between said pull-up node and said first output terminal, and said sixth MOS transistor having a gate connected to said first output terminal and a drain-source path coupled between said pull-up node and said second output terminal.
Claim 3
Dependent Claim
22 words
A sense amplifier according to claim 1, in which said pull-up potential is substantially the same as said first power source potential.
Claim 4
Dependent Claim
56 words
A sense amplifier according to claim 1, further comprising a seventh MOS transistor having a drain-source path connected at one end to said drain-source paths of said first and second transistors and at the other end to said second power source node, and having a gate coupled to receive an enable signal for the sense amplifier.
Claim 5
Dependent Claim
55 words
A sense amplifier according to claim 3, further comprising an eighth MOS transistor having a drain-source path connected at one end to the drain source paths of said fifth and sixth transistors and at the other end to said pull-up node, and having a gate coupled to receive an inverted signal of said enable signal.
Claim 6
Dependent Claim
82 words
A sense amplifier according to claim 3, further comprising eighth and ninth MOS transistors, said eighth transistor having a drain-source path connected between the drain source path of said fifth transistor and said first output means, and having a gate coupled to receive an inverted signal of said enable signal, and said ninth transistor having a drain-source path connected between the drain-source path of said sixth transistor and said second output means, and having a gate coupled to receive said inverted signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-09-28 | 1991-03-30 | 1991-09-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-09-28 | 1995-03-30 | 1995-09-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-09-28 | 1999-03-30 | 1999-09-29 | $7700.00 | Window Closed / Lapsed |