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US5221635A
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Method of making a field-effect transistor
Assignee: Texas Instruments Inc
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Filing: 1991-12-17
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Granted: 1993-06-22
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Expires: 2011-12-17
Abstract
Abstract A field-effect transistor (10, FIG. 2) possesses improved electrostatic discharge characteristics. The transistor (10), formed in a p-type semiconductor substrate, comprises a gate (16) that forms a channel between two adjacent n-regions (12 and 14). At least one of the n-regions (12) has an n-well (22) below and centered about a contact pad (18). The n-well (22) has a second lower concentration of n-type impurities than either of the n-regions.
Inventors
- 👤 Charvaka Duvvury
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 03:14
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D62/151; H10D30/00; H10D30/01; H10D30/021; H10D30/0221; H10D30/0223; H10D64/00; H10D64/01; H10D64/025; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10D64/511; H10D64/514; H10D64/516; H10D89/00; H10D89/60; H10D89/601
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
88 words
A method of forming a transistor, comprising the steps of: forming a gate region adjacent a p-type semiconductor region; forming first and second (n+) source-drain regions within said p-type semiconductor region adjacent said gate region, said source-drain regions having a selected doping concentration; implanting an n-well within said first source-drain region, said n-well extending through said first source-drain region into said semiconductor region, said n-well having a doping concentration less than said selected doping concentration; and forming a contact pad on said first source-drain region above said n-well.
Claim 2
Independent Claim
88 words
A method of forming a transistor, comprising the steps of: forming a gate region adjacent a p-type semiconductor region; forming first and second (n+) source-drain regions within said p-type semiconductor region adjacent said gate region, said source-drain regions having a selected doping concentration; implanting an n-well within said first source-drain region, said n-well extending through said first source-drain region into said semiconductor region, said n-well having a doping concentration less than said selected doping concentration; and forming a contact pad on said first source-drain region above said n-well.
Claim 3
Dependent Claim
45 words
The method of claim 1 further comprising the steps of implanting an additional n-well within said second source-drain region, said additional n-well extending through said second region into said semiconductor region; and forming a contact pad on said second source-drain region above said additional n-well.
Claim 4
Dependent Claim
52 words
The method of claim 1 wherein said first source-drain region extends a first selected depth rom the surface of said semiconductor region and said n-well extends a second selected depth from the surface of said semiconductor region, said second selected depth five to seven times the depth of said first selected depth.
Claim 5
Dependent Claim
10 words
The method of claim 1 wherein said semiconductor comprises silicon.
Claim 6
Dependent Claim
16 words
The method of claim 1 wherein said step of forming source-drain regions comprises implanting arsenic dopants.
Claim 7
Dependent Claim
19 words
The method of claim 1 and further comprising the step of forming field insulation regions adjacent said source-drain regions.
Claim 8
Dependent Claim
10 words
The method of claim 1 wherein said gate comprises aluminum.
Claim 9
Dependent Claim
17 words
The method of claim 1 and further comprising the step of forming a lightly doped drain region.
Claim 10
Dependent Claim
17 words
The method of claim 1 and further comprising the step of forming a double diffused drain region.
Claim 11
Independent Claim
109 words
A method of forming a transistor, comprising the steps of: forming a gate region adjacent a semiconductor region of a first conductivity type; forming first and second source-drain regions within said semiconductor region adjacent said gate region, said source-drain regions having a selected doping concentration of a second conductivity type opposite said first conductivity type; implanting a well region of said second conductivity type within said first source-drain region, said well region extending through said first source-drain region into said semiconductor region, said well region having a doping concentration less than said selected doping concentration; and forming a contact pad on said first source-drain region above said well region.
Claim 12
Independent Claim
109 words
A method of forming a transistor, comprising the steps of: forming a gate region adjacent a semiconductor region of a first conductivity type; forming first and second source-drain regions within said semiconductor region adjacent said gate region, said source-drain regions having a selected doping concentration of a second conductivity type opposite said first conductivity type; implanting a well region of said second conductivity type within said first source-drain region, said well region extending through said first source-drain region into said semiconductor region, said well region having a doping concentration less than said selected doping concentration; and forming a contact pad on said first source-drain region above said well region.
Claim 13
Dependent Claim
48 words
The method of claim 10 further comprising the steps of: implanting a second well region within said second source-drain region, said second well region extending through said second source-drain region into said semiconductor region; and forming a contact pad on said second source-drain region above said well region.
Claim 14
Dependent Claim
23 words
The method of claim 10 wherein said first conductivity type comprises a p-doped material and said second conductivity type comprises an n-doped material.
Claim 15
Dependent Claim
16 words
The method of claim 12 wherein said step of forming source-drain regions comprises implanting arsenic dopants.
Claim 16
Dependent Claim
53 words
The method of claim 10 wherein said first source-drain region extends a first selected depth from the surface of said semiconductor region and said well region extends a second selected depth from the surface of said semiconductor region, said second selected depth five to seven times the depth of said first selected depth.
Claim 17
Dependent Claim
10 words
The method of claim 10 wherein said semiconductor comprises silicon.
Claim 18
Dependent Claim
19 words
The method of claim 10 and further comprising the step of forming field insulation regions adjacent said source-drain regions.
Claim 19
Dependent Claim
10 words
The method of claim 10 wherein said gate comprises aluminum.
Claim 20
Dependent Claim
17 words
The method of claim 10 and further comprising the step of forming a lightly doped drain region.
Claim 21
Dependent Claim
17 words
The method of claim 10 and further comprising the step of forming a double diffused drain region.
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