US4808544A
Expired / Lapsed
US
⏱️ 0.0 years remaining
LDD structure containing conductive layer between gate oxide and sidewall spacer
Assignee: Oki Electric Industry Co Ltd
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Filing: 1988-03-28
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Granted: 1989-02-28
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Expires: 2008-03-28
Abstract
Abstract A method for manufacturing a semiconductor device is disclosed in which two essential process steps of forming a side wall spacer insulating film on a side wall of the gate electrode layer by reactive ion etching the silicon oxide film and preserving the conductive layer only beneath the side wall spacer insulating film by reactively ion-etching the conductive layer are included.
Inventors
- 👤 Hiroshi Matsui
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 16:48
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10D30/60; H10D30/601; H10D30/605; H10D64/00; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10D64/511; H10D64/517; H10D64/518; H10P; H10P50/00; H10P50/20; H10P50/26; H10P50/264; H10P50/266; H10P50/267; H10P50/268; Y; Y10; Y10S; Y10S257/00; Y10S257/90
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
114 words
A method for manufacturing a semiconductor device comprising the steps of: (a) forming respectively a field oxide film and a gate oxide film on a predetermined area of a silicon substrate; (b) forming a gate electrode layer on the gate oxide film; (c) accumulating a conductive material layer on the field oxide film, the gate oxide film and the gate electrode layer; (d) accumulating a silicon oxide film on the conductive layer; (e) forming a sidewall spacer insulating film on a sidewall of the gate electrode layer by reactively ion-etching the silicon oxide film; and (f) preserving the conductive layer only beneath the side wall spacer insulating film by reactively ion-etching the conductive layer.
Claim 2
Independent Claim
114 words
A method for manufacturing a semiconductor device comprising the steps of: (a) forming respectively a field oxide film and a gate oxide film on a predetermined area of a silicon substrate; (b) forming a gate electrode layer on the gate oxide film; (c) accumulating a conductive material layer on the field oxide film, the gate oxide film and the gate electrode layer; (d) accumulating a silicon oxide film on the conductive layer; (e) forming a sidewall spacer insulating film on a sidewall of the gate electrode layer by reactively ion-etching the silicon oxide film; and (f) preserving the conductive layer only beneath the side wall spacer insulating film by reactively ion-etching the conductive layer.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-02-28 | 1992-08-29 | 1993-02-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-02-28 | 1996-08-29 | 1997-02-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-02-28 | 2000-08-29 | 2001-02-28 | $7700.00 | Window Closed / Lapsed |