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Anti-fuse structures and methods for making same

Assignee: Philips Semiconductors Inc
•
Filing: 1991-06-04
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Granted: 1992-06-09
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Expires: 2011-06-04
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Abstract

Abstract An anti-fuse structure characterized by a substrate, an oxide layer formed over the substrate having an opening formed therein, an amorphous silicon material disposed within the opening and contacting the substrate, and oxide spacers lining the walls of a recess formed within the amorphous silicon. The spacers prevent failures of the anti-fuse structures by covering cusps formed in the amorphous silicon material. The method of the present invention forms the above-described anti-fuse structure and further solves the problem of removing unwanted spacer material from areas outside of the anti-fuse structure locations.

Inventors

  • 👤 William J. Boardman
  • 👤 David P. Chan
  • 👤 Kuang-Yeh Chang
  • 👤 Calvin T. Gabriel
  • 👤 Vivek Jain
  • 👤 Subhash R. Nariani

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 21:04
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/491; Y; Y10; Y10S; Y10S148/00; Y10S148/055

Claims Analysis

Total Claims: 18
Claim 1
Independent Claim 92 words
A method for making an anti-fuse structure comprising: providing a substrate surface; forming an insulating layer over said substrate surface; forming an opening in said insulating layer which extends down to said substrate surface; depositing an anti-fuse material into said opening such that it generally conforms to the contours of said opening to form a recess having sidewall portions and a base portion which meet at an interface; and forming insulating spacers within said recess of said anti-fuse material to substantially cover said interface between said sidewall portion and said base portion.
Claim 2
Independent Claim 92 words
A method for making an anti-fuse structure comprising: providing a substrate surface; forming an insulating layer over said substrate surface; forming an opening in said insulating layer which extends down to said substrate surface; depositing an anti-fuse material into said opening such that it generally conforms to the contours of said opening to form a recess having sidewall portions and a base portion which meet at an interface; and forming insulating spacers within said recess of said anti-fuse material to substantially cover said interface between said sidewall portion and said base portion.
Claim 3
Dependent Claim 34 words
A method for making an anti-fuse structure as recited in claim 1 wherein said step of providing a substrate surface comprises: depositing a conductive material on a supporting surface; and patterning said conductive material.
Claim 4
Dependent Claim 43 words
A method for making an anti-fuse structure as recited in claim 1 wherein said step of forming insulating spacers within said recess comprises: depositing an insulating spacer material over said anti-fuse material; and etching said insulating spacer material to leave said insulating spacers.
Claim 5
Dependent Claim 20 words
A method for making an anti-fuse structure as recited in claim 3 wherein said insulating spacer material comprises silicon dioxide.
Claim 6
Independent Claim 109 words
A method for making an array of anti-fuse structures comprising: providing a substrate surface; depositing an oxide layer over said substrate surface; etching said oxide layer to form therein a plurality of openings which extend down to said substrate surface; depositing amorphous silicon into said plurality of openings such that said amorphous silicon generally conforms to the contours of said plurality of openings to provide, within each opening, a recess having sidewall portions and a base portion which meet at an interface; and forming oxide spacers within said recesses of said amorphous silicon to substantially cover said interface between said sidewall portion and said base portion of each recess.
Claim 7
Independent Claim 109 words
A method for making an array of anti-fuse structures comprising: providing a substrate surface; depositing an oxide layer over said substrate surface; etching said oxide layer to form therein a plurality of openings which extend down to said substrate surface; depositing amorphous silicon into said plurality of openings such that said amorphous silicon generally conforms to the contours of said plurality of openings to provide, within each opening, a recess having sidewall portions and a base portion which meet at an interface; and forming oxide spacers within said recesses of said amorphous silicon to substantially cover said interface between said sidewall portion and said base portion of each recess.
Claim 8
Dependent Claim 36 words
A method for making an array of anti-fuse structures as recited in claim 5 wherein said step of providing a substrate surface comprises: depositing a conductive material on a supporting surface; and patterning said conductive material.
Claim 9
Dependent Claim 27 words
A method for making an array of anti-fuse structures as recited in claim 6 wherein said conductive material electrically couples a first plurality of said anti-fuse structures.
Claim 10
Dependent Claim 25 words
A method for making an array of anti-fuse structures as recited in claim 7 wherein said conductive material comprises an alloy of titanium and tungsten.
Claim 11
Dependent Claim 57 words
A method for making an array of anti-fuse structures as recited in claim 7 further comprising: depositing a conductive material over said amorphous silicon and said oxide spacers; and patterning said conductive material to electrically couple a second plurality of anti-fuse structures which has an anti-fuse structure in common with said first linear arrangement of anti-fuse structures.
Claim 12
Dependent Claim 61 words
A method for making an array of anti-fuse structures as recited in claim 5 wherein said step of providing a substrate surface comprises: depositing a first conductive material on a supporting surface; patterning said first conductive material; depositing an insulating material over said first conductive material; depositing a second conductive material over said insulating material; and patterning said second conductive material.
Claim 13
Dependent Claim 34 words
A method for making an array of anti-fuse structures as recited in claim 9 wherein said first conductive material comprises aluminum and wherein said second conductive material comprises an alloy of titanium and tungsten.
Claim 14
Dependent Claim 28 words
A method for making an array of anti-fuse structures as recited in claim 9 wherein said second conductive material electrically couples a first plurality of said anti-fuse structures.
Claim 15
Dependent Claim 40 words
A method for making an array of anti-fuse structures as recited in claim 11 further comprising: forming a via hole in said insulating material; and electrically coupling said first conductive material to said second conductive material through said via hole.
Claim 16
Dependent Claim 49 words
A method for making an array of anti-fuse structures as recited in claim 5 wherein said step of forming said oxide spacers comprises: depositing oxide within said recesses such that said oxide substantially conforms to the contours of said recess; and etching said oxide to form said sidewall spacers.
Claim 17
Dependent Claim 47 words
A method for making an array of anti-fuse structures as recited in claim 13 wherein said step of forming said oxide spacers further comprises: masking said sidewall spacers within said recesses of said anti-fuse material; and etching oxide residue outside of said recesses of said anti-fuse material.
Claim 18
Dependent Claim 34 words
A method for making an array of anti-fuse structures as recited in claim 15 wherein said step of etching said oxide residue comprises contacting said oxide residue with a liquid solution including hydrofluoric acid.

References Cited (Backward Citations)

US4569120A Cited
US4569121A Cited
JPS60128640A Cited
US4651409A Cited
US4751197A Cited
US4943538A Cited
US4962414A Cited
US4898841A Cited
US5011791A Cited
US4914055A Cited
US5066612A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-06-09 1995-12-09 1996-06-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-06-09 1999-12-09 2000-06-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-06-09 2003-12-09 2004-06-09 $7700.00 Window Closed / Lapsed

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