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Patent US5037768A successfully refreshed from Google Patents.
US5037768A
Expired / Lapsed
US
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Method of fabricating a double polysilicon bipolar transistor which is compatible with a method of fabricating CMOS transistors
Assignee: Motorola Solutions Inc
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Filing: 1990-02-12
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Granted: 1991-08-06
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Expires: 2010-02-12
Abstract
Abstract An improved bipolar transistor of a BiCMOS integrated circuit is fabricated by utilizing a nitride layer combined with two polysilicon layers to form a self-aligned P-type extrinsic base which results in lower base resistance and lower base-collector capacitance, and thus improved performance.
Inventors
- 👤 Stephen J. Cosentino
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 20:31
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/01; H10D10/051; H10D10/052; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0113
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
215 words
A method of fabricating a bipolar transistor, comprising the steps of: providing a semiconductor substrate; forming a polysilicon layer on the substrate; forming a dielectric layer on the substrate; doping the polysilicon layer; etching the dielectric layer and the polysilicon layer to provide an emitter window; forming a silicon dioxide layer in the emitter window; forming an extrinsic base underneath the polysilicon layer in the substrate; forming an active base region in the substrate through the emitter window; forming a nitride layer on the dielectric layer and in the emitter window on the silicon dioxide layer; etching a portion of the nitride layer surrounding the emitter window to form nitride spacers in the emitter window, wherein a portion of the nitride layer is also left remaining; etching the silicon dioxide layer in the emitter window; forming a polysilicon emitter layer in the emitter window, on the dielectric layer, and on the nitride layer; doping the polysilicon emitter layer and annealing to form an emitter region in the active base region; forming a silicide layer on the polysilicon emitter layer; and etching portions of the silicide layer, the polysilicon emitter layer, and the nitride layer such that at least portions of the silicide layer and the polysilicon emitter layer are left remaining surrounding the emitter window.
Claim 2
Independent Claim
215 words
A method of fabricating a bipolar transistor, comprising the steps of: providing a semiconductor substrate; forming a polysilicon layer on the substrate; forming a dielectric layer on the substrate; doping the polysilicon layer; etching the dielectric layer and the polysilicon layer to provide an emitter window; forming a silicon dioxide layer in the emitter window; forming an extrinsic base underneath the polysilicon layer in the substrate; forming an active base region in the substrate through the emitter window; forming a nitride layer on the dielectric layer and in the emitter window on the silicon dioxide layer; etching a portion of the nitride layer surrounding the emitter window to form nitride spacers in the emitter window, wherein a portion of the nitride layer is also left remaining; etching the silicon dioxide layer in the emitter window; forming a polysilicon emitter layer in the emitter window, on the dielectric layer, and on the nitride layer; doping the polysilicon emitter layer and annealing to form an emitter region in the active base region; forming a silicide layer on the polysilicon emitter layer; and etching portions of the silicide layer, the polysilicon emitter layer, and the nitride layer such that at least portions of the silicide layer and the polysilicon emitter layer are left remaining surrounding the emitter window.
Claim 3
Dependent Claim
34 words
The method of claim 1 wherein the substrate is comprised of a substrate of a first conductivity type, a buried layer of a second conductivity type, and a region of the second conductivity type.
Claim 4
Dependent Claim
34 words
The method of claim 2 further comprising the step of forming a deep collector region in the substrate before forming the polysilicon layer, wherein the deep collector region makes contact with the buried layer.
Claim 5
Dependent Claim
14 words
The method of claim 1 wherein the dielectric layer comprises a silicon dioxide layer.
Claim 6
Dependent Claim
46 words
The method of claim 1 further comprising the steps of: forming a thin silicon dioxide layer on the substrate; forming a thin polysilicon layer on the thin silicon dioxide layer; and removing the thin silicon dioxide and the thin polysilicon layer before forming the polysilicon layer.
Claim 7
Dependent Claim
41 words
The method of claim 1 wherein a portion of the nitride layer, in addition to the nitride spacers, is also left remaining surrounding the emitter window after etching portions of the silicide layer, the polysilicon emitter layer and the nitride layer.
Claim 8
Independent Claim
183 words
A method of fabricating a bipolar transistor, comprising the steps of: providing a semiconductor substrate; forming a polysilicon layer on the substrate forming a dielectric layer on the substrate; doping the polysilicon layer; etching the dielectric layer and the polysilicon layer to provide an emitter window; forming a silicon dioxide layer in the emitter window; forming an extrinsic base underneath the polysilicon layer in the substrate; forming an active base region in the substrate through the emitter window; forming a nitride layer on the dielectric layer and in the emitter window on the silicon dioxide layer; etching a portion of the nitride layer to form nitride spacers in the emitter window; etching the silicon dioxide layer in the emitter window; forming a polysilicon emitter layer in the emitter window, on the dielectric layer and partially overlapping the nitride layer; doping the polysilicon emitter layer and annealing to form an emitter region in the active base region; forming a silicide layer on the polysilicon emitter layer; and etching the nitride layer not covered by the polysilicon emitter layer, using the silicide as a mask.
Claim 9
Independent Claim
183 words
A method of fabricating a bipolar transistor, comprising the steps of: providing a semiconductor substrate; forming a polysilicon layer on the substrate forming a dielectric layer on the substrate; doping the polysilicon layer; etching the dielectric layer and the polysilicon layer to provide an emitter window; forming a silicon dioxide layer in the emitter window; forming an extrinsic base underneath the polysilicon layer in the substrate; forming an active base region in the substrate through the emitter window; forming a nitride layer on the dielectric layer and in the emitter window on the silicon dioxide layer; etching a portion of the nitride layer to form nitride spacers in the emitter window; etching the silicon dioxide layer in the emitter window; forming a polysilicon emitter layer in the emitter window, on the dielectric layer and partially overlapping the nitride layer; doping the polysilicon emitter layer and annealing to form an emitter region in the active base region; forming a silicide layer on the polysilicon emitter layer; and etching the nitride layer not covered by the polysilicon emitter layer, using the silicide as a mask.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-08-05 | 1995-02-04 | 1995-08-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-08-05 | 1999-02-04 | 1999-08-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-08-05 | 2003-02-04 | 2003-08-06 | $7700.00 | Window Closed / Lapsed |