Resin molded type semiconductor device having a conductor film

Claim 2

A semiconductor integrated circuit device having: (a) a plurality of active circuit elements which are formed in one major surface of a substantially tetragonal semiconductor substrate, (b) metal wiring means for electrically connecting said plurality of active circuit elements formed on the major surface of the semiconductor substrate; said metal wiring means having a broad metal conductor film extended along peripheral edges of the one major surface of the substantially tetragonal semiconductor substrate and extended on at least one corner of said semiconductor substrate, (c) an inorganic passivation film which is formed over said broad metal conductor film; and (d) a thermosetting sealing resin which overlies said passivation film and which encapsulates the semiconductor substrate, said broad metal conductor film having at least one L-shaped slit at a corner portion of the one major surface of the substantially tetragonal semiconductor substrate and the width of said broad conductor film being sufficient to act as a power source or a ground potential for the plurality of active circuit elements.

Claim 3

A semiconductor device according to claim 1, wherein said broad conductor film is covered with a passivation film comprised of phosphosilicate glass.

Claim 4

A semiconductor device according to claim 1, wherein said broad conductor film comprises aluminum.

Claim 5

A semiconductor device according to claim 1, wherein said L-shaped slit is disposed along the direction of an elongation of the broad conductor film.

Claim 6

A semiconductor device according to claim 4, wherein said thermosetting sealing resin directly covers said inorganic passivation film.

Claim 7

A semiconductor device according to claim 4, wherein said inorganic passivation film comprises a silicon nitride film.

Claim 8

A semiconductor integrated circuit device according to claim 1, further comprising a further L-shaped slit juxtaposed to said at least one L-shaped slit.

Claim 9

An integrated circuit device comprising: (a) an integrated circuit chip having a pair of major surfaces opposed to each other; (b) active circuit elements formed on a one of the pair of the major surfaces of the integrated circuit chip; (c) a first glass passivation film sensitive to moisture, which includes phosphorus oxide as one of the main constituents of the glass, and which is formed over said active circuit elements; (d) a broad metal conductor film which provides wiring for supplying ground potential or power source potential for said active circuit elements and which is formed over the first glass passivation film and arranged to extend along peripheral edges of the one of the major surfaces and to extend on at least one corner of said integrated circuit chip; (e) a plurality of bonding pads disposed on the one of the major surfaces and being surrounded with said broad metal conductor film; (f) a plurality of narrow metal conductor films for interconnecting between said active circuit elements and said bonding pads, and formed over the first glass passivation film; (g) a second passivation film of inorganic material formed over the broad metal conductor film and the plurality of narrow metal conductor films at the one of the major surfaces of the integrated circuit chip; and (h) a sealing member of resin which covers the second passivation film and said plurality of bonding pads and molds at least the one of the major surfaces of the integrated circuit chip; the broad metal conductor film including at least one L-shaped slit which is disposed within a corner portion of the broad metal conductor film at a peripheral portion of the one of the major surfaces of the integrated circuit chip; the at least one L-shaped slit having a width that is substantially smaller than the width of the broad metal conductor film provided by a portion of the broad metal conductor film adjacent thereto, and the width of the broad metal conductor film being sufficient to act as wiring for supplying ground potential or power source potential for said active circuit elements.

Claim 10

An integrated circuit device comprising: (a) an integrated circuit chip having a pair of major surfaces opposed to each other; (b) active circuit elements formed on a one of the pair of the major surfaces of the integrated circuit chip; (c) a first glass passivation film sensitive to moisture, which includes phosphorus oxide as one of the main constituents of the glass, and which is formed over said active circuit elements; (d) a broad metal conductor film which provides wiring for supplying ground potential or power source potential for said active circuit elements and which is formed over the first glass passivation film and arranged to extend along peripheral edges of the one of the major surfaces and to extend on at least one corner of said integrated circuit chip; (e) a plurality of bonding pads disposed on the one of the major surfaces and being surrounded with said broad metal conductor film; (f) a plurality of narrow metal conductor films for interconnecting between said active circuit elements and said bonding pads, and formed over the first glass passivation film; (g) a second passivation film of inorganic material formed over the broad metal conductor film and the plurality of narrow metal conductor films at the one of the major surfaces of the integrated circuit chip; and (h) a sealing member of resin which covers the second passivation film and said plurality of bonding pads and molds at least the one of the major surfaces of the integrated circuit chip; the broad metal conductor film including at least one L-shaped slit which is disposed within a corner portion of the broad metal conductor film at a peripheral portion of the one of the major surfaces of the integrated circuit chip; the at least one L-shaped slit having a width that is substantially smaller than the width of the broad metal conductor film provided by a portion of the broad metal conductor film adjacent thereto, and the width of the broad metal conductor film being sufficient to act as wiring for supplying ground potential or power source potential for said active circuit elements.

Claim 11

An integrated circuit device according to claim 8, wherein said first glass passivation film is made of phosphosilicate glass.

Claim 12

An integrated circuit device according to claim 9, wherein said broad metal conductor film and said plurality of narrow metal conductor films are made of the same metal conductor film deposited on the first glass passivation film.

Claim 13

An integrated circuit device according to claim 10, wherein said second passivation film is made of silicon nitride.

Claim 14

An integrated circuit device according to claim 11, wherein said broad metal conductor film and said plurality of narrow metal conductor films are made of metal material consisting essentially of aluminum.

Claim 15

An integrated circuit device according to claim 12, wherein said sealing member of resin is a thermo-setting resin.

Claim 16

An integrated circuit device according to claim 8, further comprising a further L-shaped slit juxtaposed to said at least one L-shaped slit.

Claim 17

A semiconductor integrated circuit device comprising: (a) a substantially tetragonal semiconductor substrate having a major surface including a first peripheral edge and a second peripheral edge adjacent to the first peripheral edge to define a corner of the major surface of the substantially tetragonal semiconductor substrate; (b) a plurality of active circuit elements which are formed on said major surface of said substantially tetragonal semiconductor substrate; (c) metal wiring means for electrically connecting said plurality of elements formed on said major surface of the semiconductor substrate, said metal wiring means having a broad metal conductor film formed adjacent to said first and second peripheral edges of said major surface of said substantially tetragonal semiconductor substrate and the broad metal conductor film extending continuously along said first and second peripheral edges; (d) an inorganic passivation film which is formed over said broad metal conductor film; and (e) a thermosetting sealing resin which overlies said passivation film and which encapsulates the semiconductor substrate, said broad metal conductor film having at least one slit formed along said first and second peripheral edges at the corner at which said first and second peripheral edges intersect, and extended from said first peripheral edge to said second peripheral edge continuously, and the width of said broad metal conductor film being sufficient to act as wiring for applying a power source or a ground potential for the plurality of elements.

Claim 18

A semiconductor integrated circuit device comprising: (a) a substantially tetragonal semiconductor substrate having a major surface including a first peripheral edge and a second peripheral edge adjacent to the first peripheral edge to define a corner of the major surface of the substantially tetragonal semiconductor substrate; (b) a plurality of active circuit elements which are formed on said major surface of said substantially tetragonal semiconductor substrate; (c) metal wiring means for electrically connecting said plurality of elements formed on said major surface of the semiconductor substrate, said metal wiring means having a broad metal conductor film formed adjacent to said first and second peripheral edges of said major surface of said substantially tetragonal semiconductor substrate and the broad metal conductor film extending continuously along said first and second peripheral edges; (d) an inorganic passivation film which is formed over said broad metal conductor film; and (e) a thermosetting sealing resin which overlies said passivation film and which encapsulates the semiconductor substrate, said broad metal conductor film having at least one slit formed along said first and second peripheral edges at the corner at which said first and second peripheral edges intersect, and extended from said first peripheral edge to said second peripheral edge continuously, and the width of said broad metal conductor film being sufficient to act as wiring for applying a power source or a ground potential for the plurality of elements.

Claim 19

A semiconductor integrated circuit device according to claim 15, further comprising: an another slit juxtaposed to said at least one slit.

Claim 20

A semiconductor integrated circuit device according to claim 15, wherein said broad metal conductor film comprises aluminum film.

Claim 21

A semiconductor integrated circuit device according to claim 17, further comprising: an another slit juxtaposed to said at least one slit.

Claim 22

A semiconductor integrated circuit device according to claim 17, wherein said inorganic passivation film comprises a silicon nitride film.

Claim 23

A semiconductor integrated circuit device according to claim 15, further comprising a further slit juxtaposed to said at least one slit.

Claim 24

A semiconductor integrated circuit device according to claim 14, wherein said further slit is formed along said first and second peripheral edges at the corner at which said first and second peripheral edges intersect.

Claim 25

A semiconductor integrated circuit device comprising: (a) a substantially tetragonal semiconductor substrate having a major surface including a first peripheral edge and a second peripheral edge adjacent to the first peripheral edge to define a corner of the major surface of the substantially tetragonal semiconductor substrate; (b) a plurality of active circuit elements which are formed on said major surface of said substantially tetragonal semiconductor substrate; (c) a plurality of bonding pads disposed along said first and second peripheral edges of said major surface of the substantially tetragonal semiconductor substrate, and disposed on said major surface of the substantially tetragonal semiconductor substrate; (d) a broad metal conductor film for supplying a power source or ground potential for said plurality of active circuit elements which is arranged between the plurality of bonding pads and a peripheral edge of said major surface of the substantially tetragonal semiconductor substrate, and which extends along said first and second peripheral edges of said major surface of the substantially tetragonal semiconductor substrate; (e) a plurality of narrow metal conductor films for interconnecting between said plurality of active circuit elements and said plurality of bonding pads; (f) an inorganic passivation film which is formed over said broad metal conductor film; and (g) a thermosetting sealing resin which overlies said passivation film and which encapsulates the semiconductor substrate, said broad metal conductor film having at least one slit formed along said first and second peripheral edges at the corner at which said first and second peripheral edges intersect, and extended from said first peripheral edge to said second peripheral edge continuously, and the width of said broad metal conductor film being sufficient to act as wiring for applying a power source or a ground potential for the plurality of elements.

Claim 26

A semiconductor integrated circuit device comprising: (a) a substantially tetragonal semiconductor substrate having a major surface including a first peripheral edge and a second peripheral edge adjacent to the first peripheral edge to define a corner of the major surface of the substantially tetragonal semiconductor substrate; (b) a plurality of active circuit elements which are formed on said major surface of said substantially tetragonal semiconductor substrate; (c) a plurality of bonding pads disposed along said first and second peripheral edges of said major surface of the substantially tetragonal semiconductor substrate, and disposed on said major surface of the substantially tetragonal semiconductor substrate; (d) a broad metal conductor film for supplying a power source or ground potential for said plurality of active circuit elements which is arranged between the plurality of bonding pads and a peripheral edge of said major surface of the substantially tetragonal semiconductor substrate, and which extends along said first and second peripheral edges of said major surface of the substantially tetragonal semiconductor substrate; (e) a plurality of narrow metal conductor films for interconnecting between said plurality of active circuit elements and said plurality of bonding pads; (f) an inorganic passivation film which is formed over said broad metal conductor film; and (g) a thermosetting sealing resin which overlies said passivation film and which encapsulates the semiconductor substrate, said broad metal conductor film having at least one slit formed along said first and second peripheral edges at the corner at which said first and second peripheral edges intersect, and extended from said first peripheral edge to said second peripheral edge continuously, and the width of said broad metal conductor film being sufficient to act as wiring for applying a power source or a ground potential for the plurality of elements.

Claim 27

A semiconductor integrated circuit device according to claim 22, further comprising: an another slit juxtaposed to said at least one slit.

Claim 28

A semiconductor integrated circuit device according to claim 22, wherein said broad and narrow conductor film each comprises aluminum film.

Claim 29

A semiconductor integrated circuit device according to claim 24, further comprising: an another slit juxtaposed to said at least one slit.

Claim 30

A semiconductor integrated circuit device according to claim 24, wherein said inorganic passivation film comprises a nitride film.

Claim 31

A semiconductor integrated circuit device according to claim 22, further comprising a further slit juxtaposed to said at least one slit.

Claim 32

A semiconductor integrated circuit device according to claim 27, wherein said further slit is formed along said first and second peripheral edges at the corner at which said first and second peripheral edges intersect.

Claim 33

A semiconductor integrated circuit device comprising: (a) a plurality of active circuit elements which are formed in one major surface of a substantially tetragonal semiconductor substrate; (b) metal wiring means for electrically connecting said plurality of active circuit elements formed on the major surface of the semiconductor substrate, said metal wiring means having a broad metal conductor film extended along peripheral edges of the one major surface of the substantially tetragonal semiconductor substrate and extended on at least one corner of said semiconductor substrate; (c) an inorganic passivation film which formed over said broad metal conductor film; and (d) a thermosetting sealing resin which overlies said passivation film and which encapsulates the semiconductor substrate, wherein said broad metal conductor film having at least one L-shaped slit disposed within a corner portion of broad metal conductor film at a peripheral portion of the one of the major surfaces of the semiconductor substrate, and the width of said broad metal conductor film being sufficient to act as a power source or a ground potential for said plurality of active circuit elements.

Claim 34

A semiconductor integrated circuit device comprising: (a) a plurality of active circuit elements which are formed in one major surface of a substantially tetragonal semiconductor substrate; (b) metal wiring means for electrically connecting said plurality of active circuit elements formed on the major surface of the semiconductor substrate, said metal wiring means having a broad metal conductor film extended along peripheral edges of the one major surface of the substantially tetragonal semiconductor substrate and extended on at least one corner of said semiconductor substrate; (c) an inorganic passivation film which formed over said broad metal conductor film; and (d) a thermosetting sealing resin which overlies said passivation film and which encapsulates the semiconductor substrate, wherein said broad metal conductor film having at least one L-shaped slit disposed within a corner portion of broad metal conductor film at a peripheral portion of the one of the major surfaces of the semiconductor substrate, and the width of said broad metal conductor film being sufficient to act as a power source or a ground potential for said plurality of active circuit elements.