Fet device with guard ring and fabrication method therefor

Claim 1

A semiconductor device having reduced surface leakage current, comprising: A semiconductor substrate of one conductivity type having portions of one surface coated with an insulating material which produce an inversion surface layer on said one surface which is of opposite conductivity type to the conductivity type of said substrate, a source region and a drain region of opposite conductivity type than said substrate, said source and drain regions being located in said one surface of said substrate, a gate electrode located over the region between said source and drain regions, potentials applied to said gate electrode affecting the conductivity of the region between said source and drain region, a guard means which is reverse-biased with respect to said substrate and is located around said source and drain regions and separate from said source for preventing surface current leakage from said source and drain regions, said guard means being located in said one surface and having the same conductivity type as said source and drain regions, bias means for applying potentials to said substrate and to said source and drain regions and to said guard means, said source and drain regions and said guard means being biased to prevent surface current leakage from said source and drain regions, said guard means being reverse biased with respect to said substrate.