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US4157563A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device

Assignee: US Philips Corp
•
Filing: 1975-03-06
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Granted: 1979-06-05
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Expires: 1995-03-06
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Abstract

Abstract A semiconductor device having a planar p-n junction which in order to increase the breakdown voltage is shunted by a resistance layer of a very high resistance provided on an insulating layer. According to the invention, a resistance layer is used in the form of an elongate strip. The strip is preferably in the form of a coil, or a number of concentric contact layers present on the insulating layer are used which cross the resistance layer and assume the potential of the resistance layer at the area of the cross-over.

Inventors

  • 👤 Cornelis A. Bosselaar

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 06:30
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/111; H10D64/115; H10W; H10W20/00; H10W20/40

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 71 words
A semiconductor device comprising: (a) a semiconductor body comprising a major surface, a first region of first conductivity type adjoining said surface, and a second region of second conductivty type adjoining said surface and having a greater doping level than said first region, said second region being substantially entirely surrounded within said semiconductor body by said first region and forming with said first region a p-n junction terminating at said surface;
Claim 2
Dependent Claim 71 words
A semiconductor device comprising: (a) a semiconductor body comprising a major surface, a first region of first conductivity type adjoining said surface, and a second region of second conductivty type adjoining said surface and having a greater doping level than said first region, said second region being substantially entirely surrounded within said semiconductor body by said first region and forming with said first region a p-n junction terminating at said surface;
Claim 3
Dependent Claim 142 words
(b) an electrically insulating layer disposed at and at least partly covering said surface, said insulating layer extending across said p-n junction and comprising apertures located at said first and second regions; and (c) a resistance layer having an elongated strip configuration that is substantially coil-shaped and comprises a plurality of turns, at least one of said turns completely surrounding said second region, said resistance layer being of high electric resistance material and being located on said insulating layer, said resistance layer being disposed over only said first region and laterally spaced from a point located above said p-n junction and electrically connected to said first and second regions via said apertures, said resistance layer covering at least a portion of said insulating layer located between said apertures and being electrically connected to at least a surface part of said insulating layer.
Claim 4
Dependent Claim 142 words
(b) an electrically insulating layer disposed at and at least partly covering said surface, said insulating layer extending across said p-n junction and comprising apertures located at said first and second regions; and (c) a resistance layer having an elongated strip configuration that is substantially coil-shaped and comprises a plurality of turns, at least one of said turns completely surrounding said second region, said resistance layer being of high electric resistance material and being located on said insulating layer, said resistance layer being disposed over only said first region and laterally spaced from a point located above said p-n junction and electrically connected to said first and second regions via said apertures, said resistance layer covering at least a portion of said insulating layer located between said apertures and being electrically connected to at least a surface part of said insulating layer.
Claim 5
Dependent Claim 20 words
A semiconductor device as recited in claim 1, wherein said resistance layer contacts substantially the whole of said surface part.
Claim 6
Dependent Claim 19 words
A semiconductor device as recited in claim 1, wherein the respective distances between adjacent ones of said turns vary.
Claim 7
Dependent Claim 16 words
A semiconductor device as recited in claim 1, wherein said resistance layer is of semiconductor material.
Claim 8
Dependent Claim 16 words
A semiconductor device as recited in claim 4, wherein said resistance layer is of polycrystalline silicon.
Claim 9
Dependent Claim 45 words
A semiconductor device as recited in claim 1, further comprising an electrically conducting layer disposed at one of said apertures and extending through said aperture to said semiconductor surface, at least one end of said resistance layer being electrically connected to said electrically conducting layer.
Claim 10
Dependent Claim 47 words
A semiconductor device as recited in claim 6, wherein said electrically conducting layer contacts said second region and extends to above said first region along the entire line of intersection of said p-n junction with said surface, said electrically conducting layer being spaced from said first region.
Claim 11
Dependent Claim 29 words
A semiconductor device as recited in claim 1, wherein said first region is the collector zone and said second region is the base zone of a high voltage transistor.

References Cited (Backward Citations)

US3405329A Cited
SE300472B Cited
US3562608A Cited
US3576478A Cited
DE2031082A1 Cited
US3614480A Cited
US3699646A Cited
US3728590A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1982-06-04 1982-12-04 1983-06-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1986-06-04 1986-12-04 1987-06-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1990-06-04 1990-12-04 1991-06-05 $7700.00 Window Closed / Lapsed

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