← Back to Patent Explorer
US5006480A Expired / Lapsed US ⏱️ 0.0 years remaining

Metal gate capacitor fabricated with a silicon gate MOS process

Assignee: Raytheon Co
•
Filing: 1990-02-13
•
Granted: 1991-04-09
•
Expires: 2010-02-13
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A method for making metal gate MOS capacitors with standard silicon gates processes, including the steps of providing a semiconductor substrate and defining active areas and capacitor areas therein, forming field oxide regions that generally surround the active areas and the capacitor areas, forming a gate oxide layer over the active areas and the capacitor areas, and forming polysilicon gates over the active areas. Highly doped source and drain regions in the active areas and highly doped bottom capacitor plate regions in the capacitor areas are then formed, and blanket oxide layer is deposited over the semiconductor structure. The capacitor areas are opened to expose the highly doped bottom capacitor plate regions, and the semiconductor structure is heated to reflow the deposited oxide layer and to grow a capacitor oxide layer over the exposed capacitor areas.

Inventors

  • 👤 C. P. Chang
  • 👤 Joseph Farb

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 21:56
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10D; H10D1/00; H10D1/01; H10D1/045; H10D1/047

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 133 words
A process for making MOS metal gate capacitors with a silicon gate process, comprising the steps of: providing a semiconductor substrate and defining active areas and capacitor areas on the surface thereof; forming field oxide regions that generally surround the active areas and the capacitor areas; forming a gate oxide layer over the active areas and the capacitor areas; forming polysilicon polysilicon gates over the active areas; forming highly doped source and drain regions in the active areas and highly doped bottom capacitor plate regions in the capacitor areas; depositing an oxide layer over the semiconductor structure; opening the capacitor areas to expose the highly doped bottom capacitor plate regions; and heating the semiconductor structure to reflow the deposited oxide layer and to grow a capacitor oxide layer over the exposed capacitor areas.
Claim 2
Dependent Claim 133 words
A process for making MOS metal gate capacitors with a silicon gate process, comprising the steps of: providing a semiconductor substrate and defining active areas and capacitor areas on the surface thereof; forming field oxide regions that generally surround the active areas and the capacitor areas; forming a gate oxide layer over the active areas and the capacitor areas; forming polysilicon polysilicon gates over the active areas; forming highly doped source and drain regions in the active areas and highly doped bottom capacitor plate regions in the capacitor areas; depositing an oxide layer over the semiconductor structure; opening the capacitor areas to expose the highly doped bottom capacitor plate regions; and heating the semiconductor structure to reflow the deposited oxide layer and to grow a capacitor oxide layer over the exposed capacitor areas.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-04-08 1994-10-08 1995-04-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-04-08 1998-10-08 1999-04-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-04-08 2002-10-08 2003-04-09 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag