BiCMOS logic circuit having a rapid output voltage falling-down property

Claim 2

A BiCMOS logic circuit which includes an input terminal, an output terminal, a MOS logic circuit connected between a first voltage supply line and a second voltage supply line and having an input connected to the input terminal, and an output circuit composed of first and second bipolar transistors connected in series between the first voltage supply line and the second voltage supply line, the first bipolar transistor having a base connected to an output of the MOS logic circuit, a connection node of the first and second bipolar transistors being connected to the output terminal, comprising a base current supplying circuit having first and second MOS transistors connected in series between said first voltage supply line and a base of said second bipolar transistor, said first MOS transistor having a gate connected to said output of said MOS logic circuit, said second MOS transistor having a gate connected to said input terminal.

Claim 3

A BiCMOS logic circuit claimed in claim 1 further including a third MOS transistor connected between said base of said second bipolar transistor and said connection node of said first and second bipolar transistor and having a gate connected to said input terminal, said base of the second bipolar transistor being connected through a resistor to said second voltage supply line.

Claim 4

A BiCMOS logic circuit claimed in claim 1 wherein said MOS logic circuit is a CMOS inverter.

Claim 5

A BiCMOS logic circuit claimed in claim 3 wherein said CMOS inverter includes a PMOS transistor having a source connected to the first voltage supply line and a gate connected to said input terminal, and a NMOS transistor having a source connected to the second voltage supply line and a gate connected to said input terminal, drains of said PMOS transistor and said NMOS transistor being connected to each other to form an output of said CMOS inverter.

Claim 6

A BiCMOS logic circuit claimed in claim 4 further including a third MOS transistor connected between said base of said second bipolar transistor and said connection node of said first and second bipolar transistors and having a gate connected to said input terminal, said base of the second bipolar transistor being connected through a resistor to said second voltage supply line.

Claim 7

A BiCMOS logic circuit claimed in claim 1 wherein said MOS logic circuit is a two-input NOR circuit.

Claim 8

A BiCMOS logic circuit claimed in claim 6 wherein said two-input NOR circuit includes first and second input terminals, a first PMOS transistor having a source connected to the first voltage supply line and a gate connected to said first input terminal, a second PMOS transistor having a source connected to a drain of said first PMOS transistor and a gate connected to said second input terminal, and first and second NMOS transistors each having a source connected to the second voltage supply line and a drain connected commonly to a drain of said second PMOS transistor, a gate of said first NMOS transistor being connected to said first input terminal, a gate of said second NMOS transistor being connected to said second input terminal, a connection node between said drain of said second PMOS transistor and said commonly connected drains of said first and second NMOS transistors forming an output of said two-input NOR circuit, and wherein said base current supplying circuit further includes a third MOS transistor connected in parallel to said second MOS transistor, the gate of said first MOS transistor being connected to said output of said two-input NOR circuit, the gate of said second MOS transistor being connected to said first input terminal, and a gate of said third MOS transistor being connected to said second input terminal.

Claim 9

A BiCMOS logic circuit claimed in claim 7 further including a fourth and fifth MOS transistors connected in parallel between said base of said second bipolar transistor and said connection node of said first and second bipolar transistors, a gate of said fourth MOS transistor being connected to said first input terminal, and a gate of said fifth MOS transistor being connected to said second input terminal, and said base of said second bipolar transistor being connected through a resistor to said second voltage supply line.

Claim 10

A BiCMOS logic circuit which includes at least one input terminal, an output terminal, a MOS logic circuit connected between a first voltage supply line and a second voltage supply line and having at least one input connected to said at least one input terminal, and an output circuit composed of first and second bipolar transistors connected in series between said first voltage supply line and said second voltage supply line, said first bipolar transistor having a base connected to an output of said MOS logic circuit, a connection node of said first and second bipolar transistors being connected to said output terminal, and a MOS transistor connected between a base of said second bipolar transistor and said connection node of said first and second bipolar transistors and having a gate connected to said at least one input terminal, said base of the second bipolar transistor being connected through a resistor to said second voltage supply line, comprising an additional base current supplying circuit connected between said first voltage supply line and said base of said second bipolar transistor and having a first control input connected to said at least one input of said MOS logic circuit and a second control input connected to said output of said MOS logic circuit so that said additional base current supplying circuit operates to supply an additional base current to said base of said second bipolar transistor from said first voltage supply line after a level on said at least input of said MOS logic circuit starts to change from a first logical level toward a second logical level until a level on said output of said MOS logic circuit substantially completes its change from one of said first and second logical levels to the other level.

Claim 11

A BiCMOS logic circuit which includes at least one input terminal, an output terminal, a MOS logic circuit connected between a first voltage supply line and a second voltage supply line and having at least one input connected to said at least one input terminal, and an output circuit composed of first and second bipolar transistors connected in series between said first voltage supply line and said second voltage supply line, said first bipolar transistor having a base connected to an output of said MOS logic circuit, a connection node of said first and second bipolar transistors being connected to said output terminal, and a MOS transistor connected between a base of said second bipolar transistor and said connection node of said first and second bipolar transistors and having a gate connected to said at least one input terminal, said base of the second bipolar transistor being connected through a resistor to said second voltage supply line, comprising an additional base current supplying circuit connected between said first voltage supply line and said base of said second bipolar transistor and having a first control input connected to said at least one input of said MOS logic circuit and a second control input connected to said output of said MOS logic circuit so that said additional base current supplying circuit operates to supply an additional base current to said base of said second bipolar transistor from said first voltage supply line after a level on said at least input of said MOS logic circuit starts to change from a first logical level toward a second logical level until a level on said output of said MOS logic circuit substantially completes its change from one of said first and second logical levels to the other level.

Claim 12

A BiCMOS logic circuit which includes at least one input terminal, an output terminal, a MOS logic circuit connected between a first voltage supply line and a second voltage supply line and having at least one input connected to said at least one input terminal, and an output circuit composed of first and second bipolar transistors connected in series between said first voltage supply line and said second voltage supply line, said first bipolar transistor having a base connected to an output of said MOS logic circuit, a connection node of said first and second bipolar transistors being connected to said output terminal, and a MOS transistor connected between a base of said second bipolar transistor and said connection node of said first and second bipolar transistors and having a gate connected to said at least one input terminal, said base of the second bipolar transistor being connected through a resistor to said second voltage supply line, comprising an additional base current supplying circuit connected between said first voltage supply line and said base of said second bipolar transistor and having a first control input connected to said at least one input terminal and a second control input connected to said output of said MOS logic circuit so that said additional base current supplying circuit operates to supply an additional base current to said base of said second bipolar transistor from said first voltage supply line after a level on said at least input terminal starts to change from a first logical level toward a second logical level until a level on said output of said MOS logic circuit substantially completes its change from one of said first and second logical levels to the other level.

Claim 13

A BiCMOS logic circuit which includes at least one input terminal, an output terminal, a MOS logic circuit connected between a first voltage supply line and a second voltage supply line and having at least one input connected to said at least one input terminal, and an output circuit composed of first and second bipolar transistors connected in series between said first voltage supply line and said second voltage supply line, said first bipolar transistor having a base connected to an output of said MOS logic circuit, a connection node of said first and second bipolar transistors being connected to said output terminal, and a MOS transistor connected between a base of said second bipolar transistor and said connection node of said first and second bipolar transistors and having a gate connected to said at least one input terminal, said base of the second bipolar transistor being connected through a resistor to said second voltage supply line, comprising an additional base current supplying circuit connected between said first voltage supply line and said base of said second bipolar transistor and having a first control input connected to said at least one input terminal and a second control input connected to said output of said MOS logic circuit so that said additional base current supplying circuit operates to supply an additional base current to said base of said second bipolar transistor from said first voltage supply line after a level on said at least input terminal starts to change from a first logical level toward a second logical level until a level on said output of said MOS logic circuit substantially completes its change from one of said first and second logical levels to the other level.