Bipolar transistor-field effect transistor composite circuit

Claim 2

A bipolar transistor-complementary field effect transistor composite circuit comprising: a first bipolar transistor having a collector of a first conductivity type connected to a first potential, a base of a second conductivity type and an emitter of the first conductivity type connected to an output terminal; a second bipolar transistor having a collector of the first conductivity type connected to said output terminal, a base of the second conductivity type and an emitter of the first conductivity type connected to a second potential; k input terminals (k≧1); k first field effect transistors of the second conductivity type, having their gates connected to a corresponding input terminal, and having their source-drain paths connected between said base and said collector of said first bipolar transistor, respectively; k second field effect transistors of the first conductivity type, having their gates connected to a corresponding input terminal, and having their source-drain paths connected between said base of said first bipolar transistor and said second potential, respectively; k third field effect transistors of the first conductivity type, having their gates connected to a corresponding input terminal, and having their source-drain paths connected between said base and said collector of said second bipolar transistor, respectively; and a discharge means coupled to the base of said second bipolar transistor for discharging the parasitic charge in the base of said second bipolar transistor.

Claim 3

A composite circuit according to claim 1, wherein said discharge means comprises a fourth field effect transistor of the first conductivity type, having a gate connected to said first bipolar transistor to be activated upon activation of said first bipolar transistor, and a source-drain path connected between said base of said second bipolar transistor and said second potential.

Claim 4

A composite circuit according to claim 2, wherein said k first, said k second, said k third and said fourth field effect transistors are MOS transistors.

Claim 5

A composite circuit according to claim 2, wherein said gate of said fourth field effect transistor is connected to said base of said first bipolar transistor.

Claim 6

A composite circuit according to claim 2, wherein said gate of said fourth field effect transistor is connected to said emitter of said first bipolar transistor.

Claim 7

A composite circuit according to claim 1, wherein said first potential is higher than said second potential.

Claim 8

A composite circuit according to claim 6, wherein said first potential is a power supply potential, and said second potential is a group potential.

Claim 9

A composite circuit according to claim 1, wherein the first conductivity type is N-type, and the second conductivity type is p-type.

Claim 10

A bipolar transistor-complementary field effect transistor composite circuit comprising: a pair of first and second bipolar transistors each having a collector of a first conductivity type, a base of a second conductivity type and emitter of the first conductivity type, and collector-emitter current paths of said pair of bipolar transistors connected in series to each other between first and second potentials, wherein a connection node between said collector-emitter current paths provides an output of the composite circuit; a first field effect transistor of the second conductivity type responsive to a predetermined input for forming a current path from said first potential to the base of said first bipolar transistor to output a signal for rendering said first bipolar transistor in the on or off state; a second field effect transistor of the first conductivity type responsive to said predetermined input for forming a current path from the base of said first bipolar transistor to said second potential to discharge parasitic charge in the base of said first bipolar transistor when it is turned into the off state; a third field effect transistor of the first conductivity type responsive to said predetermined input for forming an current path from said output connecton node to the base of said second bipolar transistor to output another signal for rendering said second bipolar transistor in the on or off state in an opposite relation to the on-off state of said first bipolar transistor; and discharge means for discharging parasitic charge in one base of said second bipolar transistor when it is turned into the off state.

Claim 11

A bipolar transistor-complementary field effect transistor composite circuit comprising: a pair of first and second bipolar transistors each having a collector of a first conductivity type, a base of a second conductivity type and emitter of the first conductivity type, and collector-emitter current paths of said pair of bipolar transistors connected in series to each other between first and second potentials, wherein a connection node between said collector-emitter current paths provides an output of the composite circuit; a first field effect transistor of the second conductivity type responsive to a predetermined input for forming a current path from said first potential to the base of said first bipolar transistor to output a signal for rendering said first bipolar transistor in the on or off state; a second field effect transistor of the first conductivity type responsive to said predetermined input for forming a current path from the base of said first bipolar transistor to said second potential to discharge parasitic charge in the base of said first bipolar transistor when it is turned into the off state; a third field effect transistor of the first conductivity type responsive to said predetermined input for forming an current path from said output connecton node to the base of said second bipolar transistor to output another signal for rendering said second bipolar transistor in the on or off state in an opposite relation to the on-off state of said first bipolar transistor; and discharge means for discharging parasitic charge in one base of said second bipolar transistor when it is turned into the off state.

Claim 12

A composite circuit according to claim 9, wherein said discharge means is a fourth field effect transistor of the first conductivity type switched into an on state when said first bipolar transistor is on, for forming a current path from the base of said second bipolar transistor to said second potential, and switched into an off state when said first bipolar transistor is off.

Claim 13

A composite circuit according to claim 10, wherein said fourth field effect transistor has its gate connected to the base of said first bipolar transistor, and its drain and source connected to the base of the second bipolar transistor and said second potential, respectively.

Claim 14

A composite circuit according to claim 10, wherein said fourth field effect transistor has its gate connected to the emitter of said first bipolar transistor, and its drain and source connected to the base of said second bipolar transistor and said second potential, respectively.

Claim 15

A composite circuit according to claim 9, wherein said first potential is a power supply potential, and said second potential is a group potential.

Claim 16

A composite circuit according to claim 1, wherein said respective first and second bipolar transistors and said first, second and third field effect transistors are arranged to operate as an emitter.

Claim 17

A gate circuit comprising: at least one input terminal; an output terminal; a first bipolar transistor having its emitter-collector current path coupled between a first supply voltage terminal and said output terminal; a second bipolar transistor having its emitter-collector current path coupled between said output terminal and a second supply voltage terminal; at least one first MOS transistor having its drain-source current path coupled between said first supply voltage terminal and a base of said first bipolar transistor, said first MOS transistor having a control electrode coupled to said input terminal; at least one second MOS transistor having its drain-source current path coupled between said output terminal and a base of said second bipolar transistor, said second MOS transistor having a control electrode coupled to said input terminal; at least one third MOS transistor having its drain-source current path coupled between said base of said first bipolar transistor and said second supply voltage terminal, and having a control electrode to said input terminal; and a MOS transistor having its drain-source current path coupled between said base of said second bipolar transistor and said second supply voltage terminal, and having a control electrode coupled to said base of said first bipolar transistor.

Claim 18

A gate circuit comprising: at least one input terminal; an output terminal; a first bipolar transistor having its emitter-collector current path coupled between a first supply voltage terminal and said output terminal; a second bipolar transistor having its emitter-collector current path coupled between said output terminal and a second supply voltage terminal; at least one first MOS transistor having its drain-source current path coupled between said first supply voltage terminal and a base of said first bipolar transistor, said first MOS transistor having a control electrode coupled to said input terminal; at least one second MOS transistor having its drain-source current path coupled between said output terminal and a base of said second bipolar transistor, said second MOS transistor having a control electrode coupled to said input terminal; at least one third MOS transistor having its drain-source current path coupled between said base of said first bipolar transistor and said second supply voltage terminal, and having a control electrode to said input terminal; and a MOS transistor having its drain-source current path coupled between said base of said second bipolar transistor and said second supply voltage terminal, and having a control electrode coupled to said base of said first bipolar transistor.