US4649294A
Expired / Lapsed
US
⏱️ 0.0 years remaining
BIMOS logic gate
Assignee: MOTOTOLA Inc A CORP OF DELAWARE
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Filing: 1986-01-13
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Granted: 1987-03-10
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Expires: 2006-01-13
Abstract
Abstract A BIMOS circuit is provided wherein an output terminal is coupled between upper and lower NPN push-pull transistors for providing high current drive capability along with no d.c. power dissipation. A first MOS transistor circuit is coupled between an input terminal and the lower transistor for biasing the lower transistor. A second MOS transistor circuit is coupled between the input terminal and the upper transistor for biasing the upper transistor. A circuit device is coupled between the output terminal and the upper transistor for increasing the output voltage swing.
Inventors
- 👤 Kevin L. McLaughlin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 09:05
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/094; H03K19/0944; H03K19/09448
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
156 words
A circuit comprising: a first supply voltage terminal; a second supply voltage terminal; an input terminal; an output terminal; a first bipolar transistor coupled between said first supply voltage terminal and said output terminal; a second bipolar transistor coupled between said output terminal and said second supply voltage terminal; first means coupled between said first and second supply voltage terminals and coupled to said input terminal and to a base of said first transistor for providing a voltage for biasing said first transistor, said first means providing a high impedance to said input terminal; second means coupled between said output terminal and a base of said second bipolar transistor and coupled to said input terminal for biasing said second transistor; and a transmission gate coupled between said base of said first bipolar transistor and said outpout terminal and having a first gate and a second gate coupled to said first and second supply voltage terminals, respectively.
Claim 2
Dependent Claim
156 words
A circuit comprising: a first supply voltage terminal; a second supply voltage terminal; an input terminal; an output terminal; a first bipolar transistor coupled between said first supply voltage terminal and said output terminal; a second bipolar transistor coupled between said output terminal and said second supply voltage terminal; first means coupled between said first and second supply voltage terminals and coupled to said input terminal and to a base of said first transistor for providing a voltage for biasing said first transistor, said first means providing a high impedance to said input terminal; second means coupled between said output terminal and a base of said second bipolar transistor and coupled to said input terminal for biasing said second transistor; and a transmission gate coupled between said base of said first bipolar transistor and said outpout terminal and having a first gate and a second gate coupled to said first and second supply voltage terminals, respectively.
Claim 3
Dependent Claim
80 words
The circuit according to claim 1 wherein said first means comprises: a first P-channel MOS transistor having a source coupled to said first supply voltage terminal, a gate coupled to said input terminal, and a drain coupled to said base of said first bipolar transistor; and a first N-channel MOS transistor having a source coupled to said second supply voltage terminal, a gate coupled to said input terminal, and a drain coupled to said base of said first bipolar transistor.
Claim 4
Dependent Claim
83 words
The circuit according to claim 2 wherein said second means comprises: a second N-channel MOS transistor having a drain coupled to said output terminal, a source coupled to a base of said second bipolar transistor, and a gate coupled to said input terminal; and a third N-channel MOS transistor having a drain coupled to the base of said second bipolar transistor, a source coupled to said second supply voltage terminal, and a gate coupled to said drain of said first P-channel MOS transistor.
Claim 5
Dependent Claim
61 words
The circuit according to claim 2 wherein said second means comprises: a second N-channel MOS transistor having a drain coupled to said output terminal, a source coupled to a base of said second bipolar transistor, and a gate coupled to said input terminal; and a resistor coupled between said base of said second bipolar transistor and said second supply voltage terminal.
Claim 6
Dependent Claim
43 words
The circuit according to claim 2 wherein said second means comprises a second N-channel MOS transistor having a drain coupled to said output terminal, a source coupled to a base of said second bipolar transistor, and a gate coupled to said input terminal.
Claim 7
Dependent Claim
36 words
The circuit according to claim 1 further comprising: third means coupled between said input terminal and said base of said second bipolar transistor and coupled to said output terminal for further biasing said second bipolar transistor.
Claim 8
Dependent Claim
151 words
A circuit comprising: a first supply voltage terminal; a second supply voltage terminal; an input terminal; an output terminal; a first bipolar transistor coupled between said first supply voltage terminal and said output terminal; a second bipolar transistor coupled between said output terminal and said second supply voltage terminal; first means coupled between said first and second supply voltage terminals and coupled to said input terminal and to a base of said first transistor for providing a voltage for biasing said first transistor, said first means providing a high impedance to said input terminal; second means coupled between said output terminal and a base of said second bipolar transistor and coupled to said input terminal for biasing said second transistor; and a transmission gate coupled between said base of said first bipolar transistor and said output terminal and having a first gate and a second gate coupled to said input terminal.
Claim 9
Dependent Claim
151 words
A circuit comprising: a first supply voltage terminal; a second supply voltage terminal; an input terminal; an output terminal; a first bipolar transistor coupled between said first supply voltage terminal and said output terminal; a second bipolar transistor coupled between said output terminal and said second supply voltage terminal; first means coupled between said first and second supply voltage terminals and coupled to said input terminal and to a base of said first transistor for providing a voltage for biasing said first transistor, said first means providing a high impedance to said input terminal; second means coupled between said output terminal and a base of said second bipolar transistor and coupled to said input terminal for biasing said second transistor; and a transmission gate coupled between said base of said first bipolar transistor and said output terminal and having a first gate and a second gate coupled to said input terminal.
Claim 10
Dependent Claim
80 words
The circuit according to claim 7 wherein said first means comprises: a first P-channel MOS transistor having a source coupled to said first supply voltage terminal, a gate coupled to said input terminal, and a drain coupled to said base of said first bipolar transistor; and a first N-channel MOS transistor having a source coupled to said second supply voltage terminal, a gate coupled to said input terminal, and a drain coupled to said base of said first bipolar transistor.
Claim 11
Dependent Claim
82 words
The circuit according to claim 8 wherein said second means comprises: a second N-channel MOS transistor having a drain coupled to said output terminal, a source coupled to a base of said second bipolar transistor, and a gate coupled to said input terminal; and a third N-channel MOS transistor having a drain coupled to the base of said second bipolar transistor, a source coupled to said second supply voltage terminal, and gate coupled to said drain of said first P-channel MOS transistor.
Claim 12
Dependent Claim
61 words
The circuit according to claim 8 wherein said second means comprises: a second N-channel MOS transistor having a drain coupled to said output terminal, a source coupled to a base of said second bipolar transistor, and a gate coupled to said input terminal; and a resistor coupled between said base of said second bipolar transistor and said second supply voltage terminal.
Claim 13
Dependent Claim
43 words
The circuit according to claim 8 wherein said second means comprises a second N-channel MOS transistor having a drain coupled to said output terminal, a source coupled to a base of said secodn bipolar transistor, and a gate coupled to said input terminal.
Claim 14
Dependent Claim
36 words
The circuit according to claim 7 further comprising: third means coupled between said input terminal and said base of said second bipolar transistor and coupled to said output terminal for further biasing said second bipolar transistor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-03-09 | 1990-09-08 | 1991-03-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-03-09 | 1994-09-08 | 1995-03-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-03-09 | 1998-09-08 | 1999-03-10 | $7700.00 | Window Closed / Lapsed |