Programmable bonding pad with sandwiched silicon oxide and silicon nitride layers

Claim 1

A semiconductor chip having a plurality of bonding pad cells arranged around the perimeter of said chip, each bonding pad cell comprising: a P-doped substrate; an N-doped epitaxial region on top of said substrate, said epitaxial region having a rectangular-shaped surface large enough to receive a metal layer to form a bonding pad; a lightly P-doped rectangular region extending from said surface into said epitaxial region; a heavily P-doped region within said lightly P-doped region; a plurality of N-doped regions within said lightly P-doped region along a first edge of said lightly P-doped region; an N+ buried layer extending into said P-doped substrate proximate said first edge of said lightly P-doped region; a plurality of N+ regions outside said lightly P-doped region proximate said first edge and extending into said N+ buried layer; a layer of silicon dioxide extending over at least a portion of said P-doped region; a layer of silicon nitride extending over at least a portion of said silicon dioxide layer; at least one of said bonding pad cells having a metal bonding pad deposited over a substantial portion of said silicon nitride layer; and said lightly P-doped region and at least one of said bonding pad cells having a metal contact other than a bonding pad coupled to one of said P-doped regions.