US4636832A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device with an improved bonding section
Assignee: Toshiba Corp
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Filing: 1986-03-04
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Granted: 1987-01-13
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Expires: 2006-03-04
Abstract
Abstract A semiconductor device with a bonding section comprising a semiconductor substrate, a silicon layer formed on the semiconductor substrate with a first insulating layer interposed therebetween, and a bonding pad formed on the silicon layer with a second insulating layer interposed therebetween. The silicon layer has substantially the same size as the bonding pad. When a lead line is bonded to the bonding pad, the silicon layer lessens the stress caused by the bonding.
Inventors
- 👤 Masahiro Abe
- 👤 Masaharu Aoyama
- 👤 Takashi Ajima
- 👤 Toshio Yonezawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 15:31
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/45; H10W20/48; H10W72/00; H10W72/071; H10W72/075; H10W72/50; H10W72/531; H10W72/536; H10W72/551; H10W72/552; H10W72/5522; H10W72/5524; H10W72/59; H10W72/90; H10W72/931; H10W72/934; H10W72/951; H10W72/952; H10W72/981; H10W72/983
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
136 words
A semiconductor device with a bonding section comprising: a semiconductor substrate having a plurality of semiconductor elements therein; a first insulating layer formed on at least one of said semiconductor elements; means for lessening stress during bonding including a silicon layer formed on said at least one of said semiconductor elements with said first insulating layer interposed therebetween; a second insulating layer formed on said silicon layer, said silicon layer being interposed between said first and second insulating layers so as to be floating; and a bonding pad formed on said silicon layer with said second insulating layer interposed therebetween, the surface area of said bonding pad being substantially equal to that of said silicon layer; whereby, when a lead line is bonded to said bonding pad, said silicon layer lessens stress caused by the bonding.
Claim 2
Dependent Claim
136 words
A semiconductor device with a bonding section comprising: a semiconductor substrate having a plurality of semiconductor elements therein; a first insulating layer formed on at least one of said semiconductor elements; means for lessening stress during bonding including a silicon layer formed on said at least one of said semiconductor elements with said first insulating layer interposed therebetween; a second insulating layer formed on said silicon layer, said silicon layer being interposed between said first and second insulating layers so as to be floating; and a bonding pad formed on said silicon layer with said second insulating layer interposed therebetween, the surface area of said bonding pad being substantially equal to that of said silicon layer; whereby, when a lead line is bonded to said bonding pad, said silicon layer lessens stress caused by the bonding.
Claim 3
Dependent Claim
20 words
A semiconductor device with a bonding section according to claim 1, wherein said silicon layer is made of polycrystalline silicon.
Claim 4
Dependent Claim
20 words
A semiconductor device with a bonding section according to claim 1, wherein said silicon layer is made of amorphous silicon.
Claim 5
Dependent Claim
26 words
A semiconductor device with a bonding section according to claim 1, further comprising a conductive layer formed in said first insulating layer under said silicon layer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-01-12 | 1990-07-14 | 1991-01-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-01-12 | 1994-07-14 | 1995-01-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-01-12 | 1998-07-14 | 1999-01-13 | $7700.00 | Window Closed / Lapsed |