Patent US4931906A successfully refreshed from Google Patents.
US4931906A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Hermetically sealed, surface mountable component and carrier for semiconductor devices
Assignee: MICRO USPD Inc
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Filing: 1988-03-25
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Granted: 1990-06-05
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Expires: 2008-03-25
Abstract
Abstract A hermetically sealed, surface mount chip carrier for a semiconductor device is disclosed. The chip carrier is formed of a plurality of layers of conductive material and insulating material. A cavity adapted to receive the semiconductor device is provided within the layers. The device is electrically connected to the conductive layers via electrical conductors bonded to exposed surfaces or shelves on selected ones of the conductive layers. The layers have a continuous periphery to eliminate gaps or vertical discontiniuties in the chip carrier. The conductive and insulating layers have similar coefficients of thermal expansion to provide unitary expansion and contraction of the entire carrier so as to maintain a hermetic seal in the chip carrier when subjected to thermal stresses.
Inventors
- 👤 Harry C. Reifel
- 👤 Eren Erdag
- 👤 Herman V. D. Soerewyn
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 14:29
CPC Classifications
H; H10; H10W; H10W76/00; H10W76/10; H10W76/12; H10W76/15; H10W76/157; H05; H05K; H05K5/00; H05K5/0091; H05K5/0095
Claims Analysis
Total Claims: 27
Claim 1
Independent Claim
139 words
A surface mountable chip carrier adapted to receive at least one semiconductor device comprising: a plurality of unitary conductive layers each comprising a sheet conductor having a predetermined thickness, a continuous periphery and a first coefficient of thermal expansion; a plurality of unitary insulating layers each having a predetermined thickness and a continuous periphery and a coefficient of thermal expansion substantially equal to said first coefficient of thermal expansion; said conductive and insulating layers being joined together to form a unitary body with at least one insulating layer interposed between adjacent conductive layers; said unitary body having a top layer and a bottom layer; and at least some of said conductive and insulating layers having a hole through the respective layers so as to form a cavity within said body adapted to receive said at least one semiconductor device.
Claim 2
Dependent Claim
139 words
A surface mountable chip carrier adapted to receive at least one semiconductor device comprising: a plurality of unitary conductive layers each comprising a sheet conductor having a predetermined thickness, a continuous periphery and a first coefficient of thermal expansion; a plurality of unitary insulating layers each having a predetermined thickness and a continuous periphery and a coefficient of thermal expansion substantially equal to said first coefficient of thermal expansion; said conductive and insulating layers being joined together to form a unitary body with at least one insulating layer interposed between adjacent conductive layers; said unitary body having a top layer and a bottom layer; and at least some of said conductive and insulating layers having a hole through the respective layers so as to form a cavity within said body adapted to receive said at least one semiconductor device.
Claim 3
Dependent Claim
28 words
The surface mountable chip carrier of claim 1 wherein said bottom layer of said unitary body comprises a conductive layer adapted for electrical interconnection with said semiconductor device.
Claim 4
Dependent Claim
41 words
The surface mountable chip carrier of claim 1 wherein at least one of said conductive layers includes an integral tab unitary with said conductive layer and extending outward from the unitary body and adapted for electrical connection to an electronic circuit.
Claim 5
Dependent Claim
18 words
The surface mountable chip carrier of claim 1 wherein said top layers forms the top of said cavity.
Claim 6
Dependent Claim
17 words
The surface mountable chip carrier of claim 4 wherein said top layer is a layer of Kovar.
Claim 7
Dependent Claim
18 words
The surface mountable chip carrier of claim 1 wherein at least one of said insulating layers is ceramic.
Claim 8
Dependent Claim
18 words
The surface mountable chip carrier of claim 1 wherein at least one of said insulating layers is alumina.
Claim 9
Dependent Claim
16 words
The surface mountable chip carrier of claim 1 wherein said bottom layer is an insulating layer.
Claim 10
Dependent Claim
23 words
The surface mountable chip carrier of claim 1 wherein at least one of said conductive layers comprises a laminate of copper and molybdenum.
Claim 11
Dependent Claim
45 words
The surface mountable chip carrier of claim 1 wherein said hole in at least one of said insulating layers is sized to expose a planar surface on an adjacent conductive layer so as to form a shelf adapted for electrical interconnection with said semiconductor device.
Claim 12
Dependent Claim
14 words
The surface mountable chip carrier of claim 1, wherein said cavity is hermetically sealed.
Claim 13
Dependent Claim
17 words
The surface mountable chip carrier of claim 1 wherein said semiconductor device is a high power device.
Claim 14
Dependent Claim
160 words
A high power component comprising: a power semiconductor device having at least two electrical contacts; a plurality of unitary conductive layers each comprising a sheet conductor having a predetermined thickness, a continuous periphery and a first coefficient of thermal expansion; a plurality of unitary insulating layers each having a predetermined thickness, a continuous periphery and a coefficient of thermal expansion substantially equal to said first coefficient of thermal expansion; said conductive and insulating layers being joined together to form a unitary body with at least one insulating layer interposed between adjacent conductive layers; said unitary body having a top layer and a bottom layer; at least some of said conductive and insulating layers having a hole through the respective layers so as to form a cavity within said body adapted to receive said power semiconductor device; said semiconductor device being disposed within said cavity; each of said semiconductor device electrical contacts being electrically interconnected to one of said conductive layers.
Claim 15
Dependent Claim
160 words
A high power component comprising: a power semiconductor device having at least two electrical contacts; a plurality of unitary conductive layers each comprising a sheet conductor having a predetermined thickness, a continuous periphery and a first coefficient of thermal expansion; a plurality of unitary insulating layers each having a predetermined thickness, a continuous periphery and a coefficient of thermal expansion substantially equal to said first coefficient of thermal expansion; said conductive and insulating layers being joined together to form a unitary body with at least one insulating layer interposed between adjacent conductive layers; said unitary body having a top layer and a bottom layer; at least some of said conductive and insulating layers having a hole through the respective layers so as to form a cavity within said body adapted to receive said power semiconductor device; said semiconductor device being disposed within said cavity; each of said semiconductor device electrical contacts being electrically interconnected to one of said conductive layers.
Claim 16
Dependent Claim
29 words
The high power component of claim 13 wherein said bottom layer of said unitary body comprises a conductive layer adapted for electrical interconnection with said high power semiconductor device.
Claim 17
Dependent Claim
40 words
The high power component of claim 13 wherein at least one of said conductive layers includes an integral tab unitary with said conductive layer and extending outward from the unitary body and adapted for electrical connection to an electronic circuit.
Claim 18
Dependent Claim
17 words
The high power component of claim 13 wherein said top layer forms the top of said cavity.
Claim 19
Dependent Claim
17 words
The high power component of claim 16 wherein said top layer is an insulating layer of Kovar.
Claim 20
Dependent Claim
17 words
The high power component of claim 13 wherein at least one of said insulating layers is ceramic.
Claim 21
Dependent Claim
17 words
The high power component of claim 13 wherein at least one of said insulating layers is alumina.
Claim 22
Dependent Claim
15 words
The high power component of claim 13 wherein said bottom layer is an insulating layer.
Claim 23
Dependent Claim
22 words
The high power component of claim 13 wherein at least one of said conductive layers comprises a laminate of copper and molybdenum.
Claim 24
Dependent Claim
44 words
The high power component of claim 13 wherein said hole in at least one of said insulating layers is sized to expose a planar surface on an adjacent conductive layer so as to form a shelf adapted for electrical interconnection with said semiconductor device.
Claim 25
Dependent Claim
14 words
The high power component of claim 13 wherein said semiconductor device is a diode.
Claim 26
Dependent Claim
15 words
The high power component of claim 13 wherein said semiconductor device is a power transistor.
Claim 27
Dependent Claim
13 words
The high power component of claim 13 wherein said cavity is hermetically sealed.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-06-04 | 1993-12-04 | 1994-06-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-06-04 | 1997-12-04 | 1998-06-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-06-04 | 2001-12-04 | 2002-06-05 | $7700.00 | Window Closed / Lapsed |