Patent US4868137A successfully refreshed from Google Patents.
US4868137A
Expired / Lapsed
US
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Method of making insulated-gate field effect transistor
Assignee: NEC Corp
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Filing: 1988-12-29
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Granted: 1989-09-19
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Expires: 2008-12-29
Abstract
Abstract A method of manufacturing an insulated-gate field effect transistor is comprised of forming on a semiconductor substrate a gate electrode elecrically insulated from the substrate. A flat insulating film of silicon oxide is formed over the substrate. A pair of openings are formed through the flat insulating film at both sides of the gate electrode such that opposite side thereof are etched and exposed. An oxide film is formed on the exposed side edges of the gate electrode. Impurities are implanted through the pair of openings into the substrate to form source and drain regions. An electroconductive polysilicon film is deposited over the substrate. The deposited polysilicon film is polished to leave a part thereof selectively in the openings to thereby form electrical contacts to the source and drain regions through the openings.
Inventors
- 👤 Taishi Kubota
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 20:25
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0113; H10P; H10P50/00; Y; Y10; Y10S; Y10S148/00; Y10S148/053
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
124 words
A method of manufacturing an insulated-gate field effect transistor comprising steps of: forming on a semiconductor substrate a gate electrode electrically insulated from said substrate; forming a flat insulating film over said substrate; forming openings through said flat insulating film at both sides of said gate electrode such that opposite sides of said gate electrode are exposed in said openings; forming oxide side-films on said exposed sides of said gate electrode; doping impurities through said openings into said substrate to form source and drain regions; depositing an electroconductive film over said substrate to fill the openings; and polishing said deposited electroconductive film to leave parts thereof selectively in said openings to thereby form electrical contacts to said source and drain regions through said openings.
Claim 2
Independent Claim
124 words
A method of manufacturing an insulated-gate field effect transistor comprising steps of: forming on a semiconductor substrate a gate electrode electrically insulated from said substrate; forming a flat insulating film over said substrate; forming openings through said flat insulating film at both sides of said gate electrode such that opposite sides of said gate electrode are exposed in said openings; forming oxide side-films on said exposed sides of said gate electrode; doping impurities through said openings into said substrate to form source and drain regions; depositing an electroconductive film over said substrate to fill the openings; and polishing said deposited electroconductive film to leave parts thereof selectively in said openings to thereby form electrical contacts to said source and drain regions through said openings.
Claim 3
Dependent Claim
59 words
A method of manufacturing an insulated gate field effect transistor according to claim 1 further comprising steps of forming on said substrate an insulating film for isolation to isolate device element areas each other, and forming in said device element area a gate insulating film prior to said step of forming said gate electrode on said gate insulating film.
Claim 4
Dependent Claim
37 words
A method of manufacturing an insulated-gate field effect transistor according to claim 1, wherein said step of forming said gate electrode comprises forming an elongated gate electrode having an initial width greater than the final width thereof.
Claim 5
Dependent Claim
47 words
A method of manufacturing an insulated-gate field effect transistor according to claim 3, wherein said step of forming said openings comprises a process for etching sequentially said flat insulating film and widthwise end portions of said gate electrode to determine the final width of said gate electrode.
Claim 6
Dependent Claim
34 words
A method of manufacturing an insulated-gate field effect transistor according to claim 1, wherein said step of forming an oxide side-film comprises a process for thermally oxidizing said exposed side of said gate electrode.
Claim 7
Dependent Claim
29 words
A method of manufacturing an insulated-gate field effect transistor according to claim 1, wherein said electroconductive film is a polysilicon film, said flat insulating film being silicon oxide film.
Claim 8
Dependent Claim
41 words
A method of manufacturing an insulated-gate field effect transistor according to claim 6, wherein said step of polishing said deposited polysilicon film comprises a process for selectively polishing utilizing aqueous solution effective to polish polysilicon and ineffective to polish silicon oxide.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-09-18 | 1993-03-20 | 1993-09-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-09-18 | 1997-03-20 | 1997-09-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-09-18 | 2001-03-20 | 2001-09-19 | $7700.00 | Window Closed / Lapsed |