Insulated gate static induction transistor and integrated circuit including same

Claim 1

An insulated-gate static induction transistor comprising: a source semiconductor region of a first conductivity type including a portion having a high impurity concentration; a source ohmic contact electrode formed on said source semiconductor region; a drain semiconductor region of said first conductivity type including a portion having a high impurity concentration; a drain ohmic contact electrode formed on said drain semiconductor region; at least one channel semiconductor region of a second conductivity type opposite to said first conductivity type, disposed between said source and drain regions and having a low impurity concentration; an insulated-gate structure including an insulating film formed on said channel semiconductor region and a conductive gate electrode formed on said insulating film, said source and drain regions defining a controlled current path therebetween through a portion of said channel semiconductor region, said channel region including a first channel portion disposed adjacent to said source region and a second channel portion disposed between said first channel portion and said drain region, adjacent to said first channel portion, said first channel portion having an impurity concentration greater than the impurity concentration of said second channel portion; and means, including said insulated gate structure and said channel region with predetermined channel length and carrier concentration, for enabling the formation of a two-dimensional potential ridge coupled to both said gate electrode and said drain region in said first channel portion, whereby said transistor exhibits nonsaturating drain current-drain voltage characteristics which obey the exponential law.