TTL/CMOS compatible input buffer with Schmitt trigger

Claim 1

A TTL/CMOS compatible input buffer network comprising: a reference voltage generator for providing a reference voltage at a coupling electrical lead; a Schmitt trigger input buffer coupled to said electrical lead; said reference voltage generator comprising a reference input buffer stage having a first P-channel enhancement transistor, and first, second and third N-channel enhancement transistors; an operational amplifier having a noninverting input terminal, an inverting input terminal, and an output lead; a large P-channel enhancement transistor having gate, source and drain electrodes, the gate electrode of said large P-channel transistor being coupled to the output lead of said operational amplifier, and the drain electrode of said large P-channel transistor being coupled to said coupling electrical lead and to said P-channel transistor of said reference input buffer stage; said operational amplifier, large P-channel transistor, and first P-channel transistor forming a negative feedback loop; means for applying a fixed reference voltage to said inverting terminal of said operational amplifier; means for connecting said noninverting terminal of said operational amplifier to the gate electrodes of said transistors of said reference input buffer stage; said Schmitt trigger input buffer comprising a Schmitt trigger having a first P-channel enhancement transistor, and first, second and third N-channel enhancement transistors; and an output stage having a native P-channel enhancement transistor and a fourth N-channel enhancement transistor, the gates of said native P-channel transistor and fourth N-channel transistor being connected to a node between said first P-channel enhancement transistor and said first N-channel enhancement transistor of said Schmitt trigger.