Process of fabricating a semiconductor insulated circuit device having a phosphosilicate glass insulating film

Claim 2

A process of fabricating a semiconductor integrated circuit device, comprising: (a) the step of forming over a semiconductor substrate a first conductive layer which comprises a polycrystalline silicon layer and a layer of a silicide of a refractory metal formed on said polycrystalline silicon layer; (b) the step of forming a first insulating film, by chemical vapor deposition, covering said first conductive layer, said first insulating film having an initial thickness; (c) the step of forming a second insulating film on said first insulating film; (d) the step of heating said second insulating film so as to cause glass flow of said second insulating film, said first insulating film having such an initial thickness that, after said step of heating said second insulating film, the thickness of said first insulating film that has not been subjected to glass flow is at least 600 Å, whereby peeling of the layer of a silicide of a refractory metal from the polycrystalline silicon layer is substantially avoided; and (e) the step of forming a second conductive layer, which comprises an aluminum film, over the second insulating film.

Claim 3

A process according to claim 1, wherein said first insulating film has a thickness ranging from 600 Å to 4000 Å.

Claim 4

A process according to claim 2, wherein said first insulating film is a silicon dioxide film having a thickness equal to or larger than 1000 Å.

Claim 5

A process according to claim 2, wherein said first insulating film is a silicon nitride film having a thickness equal to or larger than 600 Å.

Claim 6

A process according to claim 2, wherein said first insulating film is a phosphosilicate glass film having a thickness ranging from 1000 Å to 2000 Å and having a phosphorus concentration equal to or lower than 4 mol %.

Claim 7

A process according to claim 1, wherein said second insulating film is a phosphosilicate glass film having a phosphorus concentration higher than 10 mol %.

Claim 8

A process according to claim 1, wherein said refractory metal is molybdenum.

Claim 9

A process according to claim 1, wherein said refractory metal is tungsten.

Claim 10

A process according to claim 1, wherein said refractory metal is tantalum.

Claim 11

A process according to claim 1, wherein said refractory metal is titanium.

Claim 12

A process according to claim 11, wherein said first insulating film is formed contiguous with said silicide layer.

Claim 13

A process according to claim 11, wherein said first conductive layer consists of said polycrystalline silicon layer and the silicide layer.

Claim 14

A process according to claim 12, wherein said second insulating film is a phosphosilicate glass film.

Claim 15

A process according to claim 13, wherein said phosphosilicate glass film is formed contiguous with said first insulating film.

Claim 16

A process according to claim 1, wherein said first conductive layer consists of said polycrystalline silicon layer and the silicide layer.

Claim 17

A process according to claim 1, wherein said second insulating film is a phosphosilicate glass film.

Claim 18

A process according to claim 16, wherein said first insulating film has such a thickness as to prevent the phosphorus in the phosphosilicate glass of the second insulating film from being diffused into the semiconductor substrate at a heating step performed after forming the second insulating film.

Claim 19

A process of fabricating a semiconductor integrated circuit device having an MISFET, comprising: (a) the step of forming over a semiconductor substrate of first conductivity type a gate electrode which is comprised of a polycrystalline silicon layer and a layer formed on said polycrystalline silicon layer and containing a silicide of a refractory metal; (b) the step of forming semiconductor regions of second conductivity type for providing source or drain regions in said semiconductor substrate at at least one side of said gate electrode; (c) the step of forming a first insulating film, by chemical vapor deposition, covering said gate electrode and said semiconductor regions, said first insulating film having an initial thickness; (d) the step of forming a second insulating film over said first insulating film; (e) the step of heating said second insulating film so as to cause glass flow of the second insulating film, said first insulating film having such an initial thickness that, after said step of heating said second insulating film, the thickness of said first insulating film that has not been subjected to glass flow is at least 600 Å, whereby peeling of the layer containing a silicide of a refractory metal from the polycrystalline silicon layer is substantially avoided; and (f) the step of forming a conductive layer, which comprises an aluminum film, over the second insulating film.

Claim 20

A process of fabricating a semiconductor integrated circuit device having an MISFET, comprising: (a) the step of forming over a semiconductor substrate of first conductivity type a gate electrode which is comprised of a polycrystalline silicon layer and a layer formed on said polycrystalline silicon layer and containing a silicide of a refractory metal; (b) the step of forming semiconductor regions of second conductivity type for providing source or drain regions in said semiconductor substrate at at least one side of said gate electrode; (c) the step of forming a first insulating film, by chemical vapor deposition, covering said gate electrode and said semiconductor regions, said first insulating film having an initial thickness; (d) the step of forming a second insulating film over said first insulating film; (e) the step of heating said second insulating film so as to cause glass flow of the second insulating film, said first insulating film having such an initial thickness that, after said step of heating said second insulating film, the thickness of said first insulating film that has not been subjected to glass flow is at least 600 Å, whereby peeling of the layer containing a silicide of a refractory metal from the polycrystalline silicon layer is substantially avoided; and (f) the step of forming a conductive layer, which comprises an aluminum film, over the second insulating film.

Claim 21

A process according to claim 18, wherein said first insulating film has a thickness ranging from 600 Å to 4000 Å.

Claim 22

A process according to claim 19, wherein said first insulating film is a silicon dioxide film having a thickness equal to or larger than 1000 Å.

Claim 23

A process according to claim 19, wherein said first insulating film is a silicon nitride film having a thickness equal to or larger than 600 Å.

Claim 24

A process according to claim 19, wherein said first insulating film is a phosphosilicate glass film having a thickness ranging from 1000 Å to 2000 Å and having a phosphorus concentration equal to or lower than 4 mol %.

Claim 25

A process according to claim 18, wherein said second insulating film is a phosphosilicate glass film having a phosphorus concentration higher than 10 mol %.

Claim 26

A process according to claim 18, wherein said refractory metal is molybdenum.

Claim 27

A process according to claim 18, wherein said refractory metal is tungsten.

Claim 28

A process according to claim 18, wherein said refractory metal is tantalum.

Claim 29

A process according to claim 18, wherein said refractory metal is titanium.

Claim 30

A process of fabricating a complementary MIS integrated circuit, comprising: (a) the step of preparing a first semiconductor region of first conductive type and a second semiconductor region of second conductive type from a semiconductor substrate, the first and second conductivity types being of opposite conductivity; (b) the step of forming gate electrodes over said first semiconductor region and said second semiconductor region, respectively, the gate electrodes being comprised of a polycrystalline silicon layer and a layer formed on said polycrystalline silicon layer and containing a silicide of a refractory metal; (c) the step of forming source and drain regions in both said first semiconductor region and in said second semiconductor region, respectively, at the sides of the respective gate electrodes, the source and drain regions being of conductivity type opposite that of said first semiconductor region and said second semiconductor region, respectively; (d) the step of forming a first insulating film, by chemical vapor deposition, covering said gate electrodes and said source and drain regions, said first insulating film having an initial thickness; (e) the step of forming a second insulating film on said first insulating film; (f) the step of heating said second insulating film so as to cause glass flow of the second insulating film, said first insulating film having such an initial thickness that, after said step of heating said second insulating film, the thickness of said first insulating film that has not been subjected to glass flow is at least 600 Å, whereby peeling of the layer containing a silicide of a refractory metal from the polycrystalline silicon layer is substantially avoided; and (g) the step of forming a conductive layer, which comprising an aluminum film, over the second insulating film.

Claim 31

A process of fabricating a complementary MIS integrated circuit, comprising: (a) the step of preparing a first semiconductor region of first conductive type and a second semiconductor region of second conductive type from a semiconductor substrate, the first and second conductivity types being of opposite conductivity; (b) the step of forming gate electrodes over said first semiconductor region and said second semiconductor region, respectively, the gate electrodes being comprised of a polycrystalline silicon layer and a layer formed on said polycrystalline silicon layer and containing a silicide of a refractory metal; (c) the step of forming source and drain regions in both said first semiconductor region and in said second semiconductor region, respectively, at the sides of the respective gate electrodes, the source and drain regions being of conductivity type opposite that of said first semiconductor region and said second semiconductor region, respectively; (d) the step of forming a first insulating film, by chemical vapor deposition, covering said gate electrodes and said source and drain regions, said first insulating film having an initial thickness; (e) the step of forming a second insulating film on said first insulating film; (f) the step of heating said second insulating film so as to cause glass flow of the second insulating film, said first insulating film having such an initial thickness that, after said step of heating said second insulating film, the thickness of said first insulating film that has not been subjected to glass flow is at least 600 Å, whereby peeling of the layer containing a silicide of a refractory metal from the polycrystalline silicon layer is substantially avoided; and (g) the step of forming a conductive layer, which comprising an aluminum film, over the second insulating film.

Claim 32

A process according to claim 28, wherein said first insulating film has a thickness ranging from 600 Å to 4000 Å.

Claim 33

A process according to claim 29, wherein said first insulating film is a silicon dioxide film having thickness equal to or larger than 1000 Å.

Claim 34

A process according to claim 29, wherein said first insulating film is a silicon nitride film having a thickness equal to or larger than 600 Å.

Claim 35

A process according to claim 29, wherein said first insulating film is a phosphosilicate glass film having a thickness ranging from 1000 Å to 2000 Å and having a phosphorus concentration equal to or lower than 4 mol %.

Claim 36

A process according to claim 28, wherein said second insulating film is a phosphosilicate glass film having a phosphorus concentraton higher than 10 mol %.

Claim 37

A process according to claim 28, wherein said refractory metal is molybdenum.

Claim 38

A process according to claim 28, wherein said refractory metal is tungsten.

Claim 39

A process according to claim 28, wherein said refractory metal is tantalum.

Claim 40

A process according to claim 28, wherein said refractory metal is titanium.

Claim 41

A process of fabricating a semiconductor integrated circuit device in a semiconductor substrate, the integrated circuit device having a plurality of memory cells, each memory cell including a capacitor and a MISFET connected to the capacitor in series, comprising: (a) the step of forming a capacitor electrode of polycrystalline silicon over a surface of the semiconductor substrate; (b) the step of forming a gate electrode of said MISFET, said gate electrode comprising a polycrystalline silicon layer and a layer formed on said polycrystalline silicon layer and containing a silicide of a refractory metal; (c) the step of forming a first insulating film, by chemical vapor deposition, covering said capacitor electrode and said gate electrode, said first insulating film having an initial thickness; (d) the step of forming a second insulating film on said first insulating film; (e) the step of heating said second insulating film so as to cause glass flow of the second insulating film, said first insulating film having such an initial thickness that, after said step of heating said second insulating film, the thickness of said first insulating film that has not been subjected to glass flow is at least 600 Å, whereby peeling of the layer containing a silicide of a refractory metal from the polycrystalline silicon layer is substantially avoided; and (f) the step of forming a first conductive layer, which comprises an aluminum film, over the second insulating film.

Claim 42

A process of fabricating a semiconductor integrated circuit device in a semiconductor substrate, the integrated circuit device having a plurality of memory cells, each memory cell including a capacitor and a MISFET connected to the capacitor in series, comprising: (a) the step of forming a capacitor electrode of polycrystalline silicon over a surface of the semiconductor substrate; (b) the step of forming a gate electrode of said MISFET, said gate electrode comprising a polycrystalline silicon layer and a layer formed on said polycrystalline silicon layer and containing a silicide of a refractory metal; (c) the step of forming a first insulating film, by chemical vapor deposition, covering said capacitor electrode and said gate electrode, said first insulating film having an initial thickness; (d) the step of forming a second insulating film on said first insulating film; (e) the step of heating said second insulating film so as to cause glass flow of the second insulating film, said first insulating film having such an initial thickness that, after said step of heating said second insulating film, the thickness of said first insulating film that has not been subjected to glass flow is at least 600 Å, whereby peeling of the layer containing a silicide of a refractory metal from the polycrystalline silicon layer is substantially avoided; and (f) the step of forming a first conductive layer, which comprises an aluminum film, over the second insulating film.

Claim 43

A process according to claim 38, wherein said first insulating film has a thickness ranging from 600 Å to 4000 Å.

Claim 44

A process according to claim 39, wherein said first insulating film is a silicon dioxide film having a thickness equal to or larger than 1000 Å.

Claim 45

A process according to claim 39, wherein said first insulating film is a silicon nitride film having a thickness equal to or larger than 600 Å.

Claim 46

A process according to claim 39, wherein said first insulating film is a phosphosilicate glass film having a thickness ranging from 1000 Å to 2000 Å and having a phosphorus concentration equal to or lower than 4 mol %.

Claim 47

A process according to claim 38, wherein said second insulating film is a phosphosilicate glass film having a phosphorus concentration higher than 10 mol %.

Claim 48

A process according to claim 38, wherein said refractory metal is molybdenum.

Claim 49

A process according to claim 38, wherein said refractory metal is tungsten.

Claim 50

A process according to claim 38, wherein said refractory metal is tantalum.

Claim 51

A process according to claim 38, wherein said refractory metal is titanium.

Claim 52

A process of fabricating a semiconductor integrated circuit device having a phosphosilicate glass layer, which has been subjected to glass flow, over a first conductive layer comprised of (1) a polycrystalline silicon layer formed on a semiconductor substrate and (2) a layer of a silicide of a refractory metal formed on the polycrystalline silicon layer, so as to avoid peeling of the silicide layer from the polycrystalline silicon layer, comprising: (a) the step of forming a first insulating film by depositing said first insulating film on said first conductive layer, said first insulating film having an initial thickness; (b) the step of forming said phosphosilicate glass layer on said first insulating film; and (c) the step of heating said phosphosilicate glass layer so as to cause glass flow of said phosphosilicate glass layer, said first insulating film having such an initial thickness that, after the step of heating the phosphosilicate glass layer to cause glass flow thereof, the thickness of said first insulating film that has not been subjected to glass flow is at least 600 Å, whereby a stress on the silicide layer resulting from the glass flow is sufficiently reduced such that resultant peeling of the silicide layer from the polycrystalline silicon layer is substantially avoided.

Claim 53

A process of fabricating a semiconductor integrated circuit device having a phosphosilicate glass layer, which has been subjected to glass flow, over a first conductive layer comprised of (1) a polycrystalline silicon layer formed on a semiconductor substrate and (2) a layer of a silicide of a refractory metal formed on the polycrystalline silicon layer, so as to avoid peeling of the silicide layer from the polycrystalline silicon layer, comprising: (a) the step of forming a first insulating film by depositing said first insulating film on said first conductive layer, said first insulating film having an initial thickness; (b) the step of forming said phosphosilicate glass layer on said first insulating film; and (c) the step of heating said phosphosilicate glass layer so as to cause glass flow of said phosphosilicate glass layer, said first insulating film having such an initial thickness that, after the step of heating the phosphosilicate glass layer to cause glass flow thereof, the thickness of said first insulating film that has not been subjected to glass flow is at least 600 Å, whereby a stress on the silicide layer resulting from the glass flow is sufficiently reduced such that resultant peeling of the silicide layer from the polycrystalline silicon layer is substantially avoided.

Claim 54

A process according to claim 48, wherein the first insulating film is formed contiguous with the silicide layer, and the phosphosilicate glass layer is formed contiguous with the first insulating film.