← Back to Patent Explorer
US3833919A Expired / Lapsed US ⏱️ 0.0 years remaining

Multilevel conductor structure and method

Assignee: NCR Voyix Corp
•
Filing: 1972-10-12
•
Granted: 1974-09-03
•
Expires: 1992-10-12
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract The present invention relates to a multilevel conductor structure and to a method of insulating an upper level of conductors from a lower level of conductors on a silicon substrate of an integrated circuit. An undoped silicon oxide insulator layer and a doped silicon oxide insulator layer are successively placed on the lower level of conductors and the structure is heated to a temperature which is sufficient to cause the doped oxide insulator layer to soften and to flow above the lower conductors to produce tapered steps over the edges of the lower level of conductors. An upper level of conductor is then formed on the tapered doped silicon oxide insulator layer. The undoped silicon oxide insulator layer formed between the doped silicon oxide insulator layer and the lower level of conductors prevents doping atoms of the doped silicon oxide insulator layer from penetrating into source or drain regions of the silicon substrate which are usually in the vicinity of the lower level of conductors to change their conductivity.

Inventors

  • 👤 C Naber

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 16:48
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10D; H10D99/00; H10P; H10P14/00; H10P14/60; H10P14/63; H10P14/6326; H10P14/6328; H10P14/6334; H10P14/66; H10P14/662; H10P14/668; H10P14/6681; H10P14/6682; H10P14/69; H10P14/692; H10P14/6921; H10P14/69215; H10P14/6922; H10P14/6923; H10P14/694; H10P14/6943; H10P14/69433; H10P95/00; H10W74/00; H10W74/10; H10W74/131; H10W74/40; H10W74/47

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 106 words
A semiconductor structure, comprising: a. a semiconductor substrate; b. a plurality of first conductor leads in contact with and covering certain areas of one surface of the semiconductor substrate; c. an undoped insulator layer covering both the plurality of first conductor leads and any remaining uncovered areas of the surface of the semiconductor substrate; d. a doped insulator layer disposed on the undoped insulator layer, and having tapered sections at those portions of the doped insulator layer adjacent the edges of the plurality of first conductor leads; and e. a plurality of second conductor leads disposed on the exposed tapered sections of the doped insulator layer.
Claim 2
Dependent Claim 106 words
A semiconductor structure, comprising: a. a semiconductor substrate; b. a plurality of first conductor leads in contact with and covering certain areas of one surface of the semiconductor substrate; c. an undoped insulator layer covering both the plurality of first conductor leads and any remaining uncovered areas of the surface of the semiconductor substrate; d. a doped insulator layer disposed on the undoped insulator layer, and having tapered sections at those portions of the doped insulator layer adjacent the edges of the plurality of first conductor leads; and e. a plurality of second conductor leads disposed on the exposed tapered sections of the doped insulator layer.
Claim 3
Dependent Claim 16 words
The semiconductor structure of claim 1 wherein the at least one second electrical lead is aluminum.
Claim 4
Dependent Claim 14 words
The structure of claim 1 wherein the plurality of first conductor leads are polysilicon.
Claim 5
Dependent Claim 15 words
The structure of claim 1 wherein the doped insulator layer is doped with phosphorous oxide.
Claim 6
Dependent Claim 17 words
The structure of claim 1 wherein the undoped insulator layer is an undoped silicon oxide insulator layer.
Claim 7
Dependent Claim 16 words
The structure of claim 1 wherein the doped insulator is a doped silicon oxide insulator layer.
Claim 8
Dependent Claim 101 words
A semiconductor structure, comprising: a. a semiconductor substrate; b. a first undoped insulator layer disposed on selected portions of the semiconductor substrate; c. a plurality of first conductor leads on selected areas of the exposed surface of the first undoped insulator layer; d. a second undoped insulator layer on the plurality of first conductor leads and also on exposed areas of the surface of the semiconductor substrate; e. a doped insulator layer on the exposed surface of the second undoped unsulator layer; and f. a plurality of second conductor leads on the exposed surface of the doped silicon oxide insulator layer.
Claim 9
Dependent Claim 101 words
A semiconductor structure, comprising: a. a semiconductor substrate; b. a first undoped insulator layer disposed on selected portions of the semiconductor substrate; c. a plurality of first conductor leads on selected areas of the exposed surface of the first undoped insulator layer; d. a second undoped insulator layer on the plurality of first conductor leads and also on exposed areas of the surface of the semiconductor substrate; e. a doped insulator layer on the exposed surface of the second undoped unsulator layer; and f. a plurality of second conductor leads on the exposed surface of the doped silicon oxide insulator layer.

References Cited (Backward Citations)

US3546013A Cited
US3497407A Cited
US3581161A Cited
US3632433A Cited
US3584264A Cited
US3566457A Cited
US3575743A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-09-02 1978-03-04 1978-09-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-09-02 1982-03-04 1982-09-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-09-02 1986-03-04 1986-09-03 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag