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US4751193A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of making SOI recrystallized layers by short spatially uniform light pulses

Assignee: Q-DOT Inc A CORP OF
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Filing: 1986-10-09
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Granted: 1988-06-14
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Expires: 2006-10-09
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Abstract

Abstract Method is provided for manufacturing large crystalline and monocrystalline semiconductor-on-insulator devices.

Inventors

  • 👤 James J. Myrick

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 07:30
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/20; H10P14/29; H10P14/2901; H10P14/2922; G; G02; G02B; G02B6/00; G02B6/10; G02B6/12; G02B6/122; H10P14/2902; H10P14/2905; H10P14/32; H10P14/3202; H10P14/3238; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/38; H10P14/3802; H10P14/3808; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10P90/1912; H10W; H10W10/00; H10W10/10; H10W10/181; H10W20/00; H10W20/40; Y; Y10; Y10S; Y10S148/00; Y10S148/004; Y10S148/077; Y10S148/093

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 173 words
A method for manufacturing a large crystalline or monocrystalline semiconductor-on-insulator device comprising the steps of providing an amorphous or polycrystalline semiconductor layer at least partially on an insulating substrate, depositing a dielectric layer atop the semiconductor layer, applying an intense pulse of light having a duration of from about 1 nanosecond to about 10 milliseconds to said semiconductor layer through said dielectric layer sufficient to melt at least a major portion of said layer, crystallizing the melted semiconductor layer to provide a crystallized layer having a larger crystal structure than said amorphous or polycrystalline semiconductor layer prior to melting thereof, applying a second intense patterned pulse of light having a duration of from about 1 nanosecond to about 10 milliseconds to remelt all but selected portions of said crystallized layer to provide remelted portions of said layer adjacent unmelted portions of said layer, and recrystallizing said remelted portions in a monocrystalline manner from said unmelted portions adjacent thereto to provide a semiconductor-on-insulator device having large crystalline or monocrystalline zones in said semiconductor layer.
Claim 2
Independent Claim 173 words
A method for manufacturing a large crystalline or monocrystalline semiconductor-on-insulator device comprising the steps of providing an amorphous or polycrystalline semiconductor layer at least partially on an insulating substrate, depositing a dielectric layer atop the semiconductor layer, applying an intense pulse of light having a duration of from about 1 nanosecond to about 10 milliseconds to said semiconductor layer through said dielectric layer sufficient to melt at least a major portion of said layer, crystallizing the melted semiconductor layer to provide a crystallized layer having a larger crystal structure than said amorphous or polycrystalline semiconductor layer prior to melting thereof, applying a second intense patterned pulse of light having a duration of from about 1 nanosecond to about 10 milliseconds to remelt all but selected portions of said crystallized layer to provide remelted portions of said layer adjacent unmelted portions of said layer, and recrystallizing said remelted portions in a monocrystalline manner from said unmelted portions adjacent thereto to provide a semiconductor-on-insulator device having large crystalline or monocrystalline zones in said semiconductor layer.
Claim 3
Independent Claim 248 words
A method for manufacturing a large crystalline or monocrystalline semiconductor-on-insulator wafer, comprising the steps of providing a monocrystalline semiconductor substrate wafer, providing a first dielectric layer on at least one major surface of said wafer, etching a plurality of window zones through said dielectric layer to said semiconductor substrate wafer, applying a polycrystalline or amorphous semiconductor layer atop said dielectric layer in contact with said semiconductor substrate at said window zones, applying a second dielectric layer atop said semiconductor layer, heating said wafer and said deposited layers to an elevated temperature below the melting point of the semiconductor wafer substrate, applying an intense pulse of light having a duration of from about 1 nanosecond to about 10 milliseconds to said amorphous or polycrystalline semiconductor layer which is spatially uniform across said wafer sufficient to substantially instantaneously melt the semiconductor layer together with a small portion of the semiconductor substrate at the window zones, preferentially conducting heat from the melted semiconductor layer at the window zones to rapidly reduce the temperature of the molten semiconductor layer to a crystallization temperature, crystallizing the melted layer in a monocrystalline manner from the window zones across the top of the wafer over the first dielectric layer to provide a thin monocrystalline semiconductor layer in zones over the first dielectric layer between the window zones, and removing the second dielectric layer to provide a substantially monocrystalline semiconductor-on-insulator structure and fabricating semiconductor integrated circuit devices in the thin monocrystalline layer intermediate the window zones.
Claim 4
Independent Claim 248 words
A method for manufacturing a large crystalline or monocrystalline semiconductor-on-insulator wafer, comprising the steps of providing a monocrystalline semiconductor substrate wafer, providing a first dielectric layer on at least one major surface of said wafer, etching a plurality of window zones through said dielectric layer to said semiconductor substrate wafer, applying a polycrystalline or amorphous semiconductor layer atop said dielectric layer in contact with said semiconductor substrate at said window zones, applying a second dielectric layer atop said semiconductor layer, heating said wafer and said deposited layers to an elevated temperature below the melting point of the semiconductor wafer substrate, applying an intense pulse of light having a duration of from about 1 nanosecond to about 10 milliseconds to said amorphous or polycrystalline semiconductor layer which is spatially uniform across said wafer sufficient to substantially instantaneously melt the semiconductor layer together with a small portion of the semiconductor substrate at the window zones, preferentially conducting heat from the melted semiconductor layer at the window zones to rapidly reduce the temperature of the molten semiconductor layer to a crystallization temperature, crystallizing the melted layer in a monocrystalline manner from the window zones across the top of the wafer over the first dielectric layer to provide a thin monocrystalline semiconductor layer in zones over the first dielectric layer between the window zones, and removing the second dielectric layer to provide a substantially monocrystalline semiconductor-on-insulator structure and fabricating semiconductor integrated circuit devices in the thin monocrystalline layer intermediate the window zones.

References Cited (Backward Citations)

US4350537A Cited
US4482393A Cited
US4356384A Cited
JPS5833832A Cited
US4461670A Cited
DD221207A1 Cited
US4564403A Cited
US4662949A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-06-14 1991-12-14 1992-06-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-06-14 1995-12-14 1996-06-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-06-14 1999-12-14 2000-06-14 $7700.00 Window Closed / Lapsed

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