US4700461A
Expired / Lapsed
US
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Process for making junction field-effect transistors
Assignee: Massachusetts Institute of Technology
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Filing: 1986-09-29
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Granted: 1987-10-20
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Expires: 2006-09-29
Abstract
Abstract A self-aligned integrated JFET device is described wherein an oxide extension region and a doped polysilicon gate is used as part of a self-aligned mask to form drain and source regions. Asymmetric JFETs for power circuit applications can be made in accordance with the invention. Additionally, complementary enhancement mode JFETs can be made in accordance with the invention, for low power consumption and excellent radiation-hardened characteristics.
Inventors
- 👤 Hong-Kyun Choi
- 👤 Bor-Yeu Tsaur
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 04:36
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/051; H10D30/80; H10D30/83; H10D30/832; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D86/00; H10D86/01; H10D86/03; H10P; H10P76/00; H10P76/40; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10W; H10W10/00; H10W10/01; H10W10/061; H10W10/10; H10W10/181; H10W10/011; H10W10/012; H10W10/13
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
155 words
A method of forming a junction field-effect transistor on a substrate comprising the steps of: (a) forming an island of silicon on, or in, said substrate; (b) doping said island with one type of conductivity dopant; (c) forming two closely spaced regions of opposite conductivity in said island extending to an upper surface of said island; (d) forming oxide extension regions over said opposite conductivity regions; (e) forming opposite conductivity regions on either side of said oxide extension regions and between said regions; (f) forming a silicon gate region of said one type conductivity over said oxide extension regions, and the opposite conductivity region therebetween, to form a shallow p-n junction adjacent the interface between the silicon gate region and the underlying region between the oxide extensions; and (g) forming source and drain regions of opposite conductivity at either side of the gate region using the oxide extension regions and gate region as a mask.
Claim 2
Independent Claim
155 words
A method of forming a junction field-effect transistor on a substrate comprising the steps of: (a) forming an island of silicon on, or in, said substrate; (b) doping said island with one type of conductivity dopant; (c) forming two closely spaced regions of opposite conductivity in said island extending to an upper surface of said island; (d) forming oxide extension regions over said opposite conductivity regions; (e) forming opposite conductivity regions on either side of said oxide extension regions and between said regions; (f) forming a silicon gate region of said one type conductivity over said oxide extension regions, and the opposite conductivity region therebetween, to form a shallow p-n junction adjacent the interface between the silicon gate region and the underlying region between the oxide extensions; and (g) forming source and drain regions of opposite conductivity at either side of the gate region using the oxide extension regions and gate region as a mask.
Claim 3
Dependent Claim
15 words
The method of claim 1 wherein the substrate comprises bulk single crystal silicon or silicon-on-insulator.
Claim 4
Dependent Claim
11 words
The method of claim 2 wherein the silicon-on-insulator substrate is silicon-on-sapphire.
Claim 5
Dependent Claim
22 words
The method of claim 1 wherein the source and drain regions are of n-type conductivity and the gate region of p-type conductivity.
Claim 6
Dependent Claim
22 words
The method of claim 1 wherein the source and drain regions are of p-type conductivity and the gate region of n-type conductivity.
Claim 7
Dependent Claim
38 words
The method of claim 1 wherein the precursor for forming the substrate in step (a) is a single crystalline silicon film formed by zone melting and recrystallization of a polysilicon film formed on an SiO 2 /Si substrate.
Claim 8
Dependent Claim
18 words
The method of claim 1 wherein the island is isolated by local oxidation of selected areas of silicon.
Claim 9
Dependent Claim
24 words
The method of claim 1 wherein the island is isolated by etching of silicon to form mesa structures down to the upper substrate surface.
Claim 10
Dependent Claim
15 words
The method of claim 1 wherein the oxide extension regions are formed by selective oxidation.
Claim 11
Dependent Claim
19 words
The method of claim 1 wherein the regions formed in step (c) are formed by ion-implantation of dopant ions.
Claim 12
Dependent Claim
18 words
The method of claim 1 wherein the regions formed in steps (c) and (d) are asymmetric in width.
Claim 13
Independent Claim
175 words
A method of forming an integrated junction field-effect device on a substrate comprising the steps of: (a) forming an isolated device region of substantially single crystal silicon on a substrate; (b) providing an impurity of one type conductivity in said device region; (c) forming two closely spaced regions of opposite conductivity in said device region at exposed surfaces thereof; (d) forming oxide extension regions over said opposite conductivity regions; (e) forming opposite conductivity regions on either side of said oxide extension regions and between said regions; (f) forming a polysilicon layer of said one type conductivity over said opposite conductivity regions and oxide extension regions; (g) selectively removing said polysilicon layer to leave a gate region extending over and between the oxide extension regions to form a shallow junction adjacent the interface between the gate region and the underlying opposite conductivity region between the oxide extension regions; and (h) forming source and drain regions of opposite conductivity at either side of the gate region using the oxide extension regions and gate region as a mask.
Claim 14
Independent Claim
175 words
A method of forming an integrated junction field-effect device on a substrate comprising the steps of: (a) forming an isolated device region of substantially single crystal silicon on a substrate; (b) providing an impurity of one type conductivity in said device region; (c) forming two closely spaced regions of opposite conductivity in said device region at exposed surfaces thereof; (d) forming oxide extension regions over said opposite conductivity regions; (e) forming opposite conductivity regions on either side of said oxide extension regions and between said regions; (f) forming a polysilicon layer of said one type conductivity over said opposite conductivity regions and oxide extension regions; (g) selectively removing said polysilicon layer to leave a gate region extending over and between the oxide extension regions to form a shallow junction adjacent the interface between the gate region and the underlying opposite conductivity region between the oxide extension regions; and (h) forming source and drain regions of opposite conductivity at either side of the gate region using the oxide extension regions and gate region as a mask.
Claim 15
Dependent Claim
22 words
The method of claim 12 wherein the source and drain regions are of n-type conductivity and the gate region of p-type conductivity.
Claim 16
Dependent Claim
22 words
The method of claim 12 wherein the source and drain regions are of p-type conductivity and the gate region of n-type conductivity.
Claim 17
Dependent Claim
50 words
The method of claim 13 wherein a second integrated junction field-effect device is formed adjacent the device of claim 12 on the same substrate in parallel with the steps of claim 12 and wherein the source and drain regions are of p-type conductivity and the gate region of n-type conductivity.
Claim 18
Dependent Claim
13 words
The method of claim 12 wherein the substrate comprises bulk silicon, or silicon-on-insulator.
Claim 19
Dependent Claim
11 words
The method of claim 16 wherein the silicon-on-insulator substrate is silicon-on-sapphire.
Claim 20
Dependent Claim
38 words
The method of claim 12 wherein the device region is formed by selective oxidation of silicon by masking with an oxide/nitride layer and the impurity of one type conductivity is implanted through opening maid in said oxide/nitride layer.
Claim 21
Dependent Claim
23 words
The method of claim 18 wherein the oxide extension regions are formed by selective oxidation of silicon through openings in said oxide/nitride layer.
Claim 22
Dependent Claim
41 words
The method of claim 12 wherein the regions formed in step (h) are more heavily doped than the regions formed in step (c) and the regions formed in step (c) are more heavily doped than the regions formed in step (e).
Claim 23
Dependent Claim
19 words
The method of claim 12 wherein the regions formed in steps (c) and (d) are asymmetric in lateral width.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-10-19 | 1991-04-20 | 1991-10-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-10-19 | 1995-04-20 | 1995-10-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-10-19 | 1999-04-20 | 1999-10-20 | $7700.00 | Window Closed / Lapsed |