Method of manufacturing a semiconductor device

Claim 1

A method of manufacturing a semiconductor device having a semiconductor body comprising a surface and a surface-adjoining region of p-type silicon in which there are present at least two insulated gate field effect transistors whose source and drain zones are formed by n-type conductivity surface-adjoining zones, said body comprising at least a n-type conductivity further surface zone which forms a conductive connection between one of the source and drain zones of one field effect transistor and one of the source and drain zones of the other field effect transistor, said further surface zone being formed in said p-type surface region, said method comprising the steps of: (a) positioning on said surface a doping mask which has an aperture at a predetermined area of said surface at which the surface zone is to be provided, said surface comprising a certain other area at which said the field effect transistors are to be provided, said doping mask comprising at at least said certain other area layer portions of a material masking said body against oxidation, (b) providing atoms selected from the group As and Sb, in the semiconductor body via said aperture in the doping mask, (c) after such provision of said atoms, removing partly said doping mask so as to obtain an oxidation mask which comprises said layer portions, (d) then subjecting said body to an oxidation treatment so as to obtain an oxide pattern which is at least partly sunk in the semiconductor body and which extends beside the layer portions masking against oxidation and above said predetermined area intended for the surface zone, during such oxidation treatment said atoms provided in the body at said predetermined area for the surface zone being caused to diffuse deeper into said semiconductor body and form there said n-type surface zone located below and adjoining the sunken oxide, (e) after such oxidation treatment, providing insulated gate electrodes of said transistors at said predetermined area, where said field effect transistors are to be formed, which electrodes, viewed on the surface, are situated on either side of and at a distance from said surface zone, and (f) providing the source and drain zones of the field effect transistors adjoining the sunken oxide pattern by doping exposed parts of said region with an impurity selected from the group P, As and Sb in a self-registering manner down to a depth at which the said zones of the field effect transistors that are to be connected together adjoin said surface zone below said sunken oxide pattern.

Claim 2

A method of manufacturing a semiconductor device having a semiconductor body comprising a surface and a surface-adjoining region of p-type silicon in which there are present at least two insulated gate field effect transistors whose source and drain zones are formed by n-type conductivity surface-adjoining zones, said body comprising at least a n-type conductivity further surface zone which forms a conductive connection between one of the source and drain zones of one field effect transistor and one of the source and drain zones of the other field effect transistor, said further surface zone being formed in said p-type surface region, said method comprising the steps of: (a) positioning on said surface a doping mask which has an aperture at a predetermined area of said surface at which the surface zone is to be provided, said surface comprising a certain other area at which said the field effect transistors are to be provided, said doping mask comprising at at least said certain other area layer portions of a material masking said body against oxidation, (b) providing atoms selected from the group As and Sb, in the semiconductor body via said aperture in the doping mask, (c) after such provision of said atoms, removing partly said doping mask so as to obtain an oxidation mask which comprises said layer portions, (d) then subjecting said body to an oxidation treatment so as to obtain an oxide pattern which is at least partly sunk in the semiconductor body and which extends beside the layer portions masking against oxidation and above said predetermined area intended for the surface zone, during such oxidation treatment said atoms provided in the body at said predetermined area for the surface zone being caused to diffuse deeper into said semiconductor body and form there said n-type surface zone located below and adjoining the sunken oxide, (e) after such oxidation treatment, providing insulated gate electrodes of said transistors at said predetermined area, where said field effect transistors are to be formed, which electrodes, viewed on the surface, are situated on either side of and at a distance from said surface zone, and (f) providing the source and drain zones of the field effect transistors adjoining the sunken oxide pattern by doping exposed parts of said region with an impurity selected from the group P, As and Sb in a self-registering manner down to a depth at which the said zones of the field effect transistors that are to be connected together adjoin said surface zone below said sunken oxide pattern.