US4393578A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of making silicon-on-sapphire FET
Assignee: Lockheed Martin Corp
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Filing: 1982-03-22
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Granted: 1983-07-19
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Expires: 2002-03-22
Abstract
Abstract Junction and metal-semiconductor field effect transistors have a sapphire substrate to realize isolation and reduced capacitance, and have a self-aligned gate to minimize source parasitic resistance. A lightly doped, opposite conductivity type region under the channel forces carriers to flow near the silicon surface where mobility is high; this region is depleted at all times by the P-N junction built-in voltage and acts as an insulator. These devices serve as switches in high speed logic applications and as microwave amplifiers.
Inventors
- 👤 William R. Cady
- 👤 SePuan Yu
- 👤 John R. Eshbach
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 05:45
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/80; H10D30/83; H10D30/832; H10D30/87; H10D30/875; H10D62/00; H10D62/10; H10D62/17; H10D62/213; H10D62/221; Y; Y10; Y10S; Y10S148/00; Y10S148/026; Y10S148/15
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
162 words
The method of making a silicon-on-sapphire junction field effect transistor structure comprising the steps of: forming on a sapphire substrate lower and upper opposite conductivity type silicon layers having given area dimensions, said lower layer being lightly doped and said upper layer moderately doped; depositing on said upper silicon layer a layer of doped polycrystalline silicon and fabricating thereon a patterning layer; etching said polycrystalline silicon to undercut beneath said patterning layer and define a gate conductor; implanting impurity ions into exposed areas of said silicon layers using said patterning layer as a mask, and removing the latter; annealing to activate said implanted impurity ions and result in heavily doped source and drain regions which are self-aligned with said gate conductor and have a channel region therebetween, said annealing further diffusing impurity atoms from said polycrystalline silicon gate conductor to create a gate region of opposite conductivity type as said channel region; and depositing conductor metallizations on said source and drain regions.
Claim 2
Independent Claim
162 words
The method of making a silicon-on-sapphire junction field effect transistor structure comprising the steps of: forming on a sapphire substrate lower and upper opposite conductivity type silicon layers having given area dimensions, said lower layer being lightly doped and said upper layer moderately doped; depositing on said upper silicon layer a layer of doped polycrystalline silicon and fabricating thereon a patterning layer; etching said polycrystalline silicon to undercut beneath said patterning layer and define a gate conductor; implanting impurity ions into exposed areas of said silicon layers using said patterning layer as a mask, and removing the latter; annealing to activate said implanted impurity ions and result in heavily doped source and drain regions which are self-aligned with said gate conductor and have a channel region therebetween, said annealing further diffusing impurity atoms from said polycrystalline silicon gate conductor to create a gate region of opposite conductivity type as said channel region; and depositing conductor metallizations on said source and drain regions.
Claim 3
Independent Claim
147 words
The method of making a silicon-on-sapphire metal-semiconductor field effect transistor structure comprising the steps of: forming on a sapphire substrate a lower P-type and an upper N-type silicon layer having given area dimensions, said lower layer being lightly doped and said upper layer moderately doped; depositing on said upper silicon layer a layer of metal and fabricating thereon a patterning layer; etching said metal layer to undercut beneath said patterning layer and define a gate conductor; implanting impurity ions into exposed areas of said silicon layers using said patterning layer as the mask, and removing the latter; annealing to activate said implanted impurity ions and produce heavily doped source and drain regions which are self-aligned with said gate metal and have a channel region therebetween, said annealing further forming a Schottky barrier at the gate metal-channel interface; and depositing conductor metallizations on said source and drain regions.
Claim 4
Independent Claim
147 words
The method of making a silicon-on-sapphire metal-semiconductor field effect transistor structure comprising the steps of: forming on a sapphire substrate a lower P-type and an upper N-type silicon layer having given area dimensions, said lower layer being lightly doped and said upper layer moderately doped; depositing on said upper silicon layer a layer of metal and fabricating thereon a patterning layer; etching said metal layer to undercut beneath said patterning layer and define a gate conductor; implanting impurity ions into exposed areas of said silicon layers using said patterning layer as the mask, and removing the latter; annealing to activate said implanted impurity ions and produce heavily doped source and drain regions which are self-aligned with said gate metal and have a channel region therebetween, said annealing further forming a Schottky barrier at the gate metal-channel interface; and depositing conductor metallizations on said source and drain regions.
Claim 5
Dependent Claim
41 words
The method of claim 2 wherein the doping and thickness of said lower silicon layer are such that said lower layer is depleted of charge carriers by the P-N junction built-in voltage under all operating conditions and acts as an insulator.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-07-18 | 1987-01-17 | 1987-07-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-07-18 | 1991-01-17 | 1991-07-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-07-18 | 1995-01-17 | 1995-07-19 | $7700.00 | Window Closed / Lapsed |