Method of fabricating semiconductor device having low resistance non-alloyed contact layer

Claim 1

A method of fabricating a semicinductor device in a Group III-V compound substrate, comprising the steps of: (a) forming an active region in the substrate; (b) forming a gate electrode in a selected portion of said active region; and (c) using said gate electrode as a mask, implanting ions in selected portions of said active region to form non-alloyed source and drain contact layers, said ions implanted in said selected portions of said active region being selected from at least one element of the Groups III and V of the periodic table and selected in accordance with the composition of said substrate; and (d) forming source and drain electrodes by depositing on said source and drain contact layers, respectively, an electrode material selected from the group comprising gold, tungsten, gold-titanium alloys and gold-germanium-nickel alloys, the barrier height across the interfaces of said source and drain electrodes and said non-alloyed contact layer being lower than the barrier height across an interface of said source and drain electrodes and said active region.

Claim 2

A method of fabricating a semicinductor device in a Group III-V compound substrate, comprising the steps of: (a) forming an active region in the substrate; (b) forming a gate electrode in a selected portion of said active region; and (c) using said gate electrode as a mask, implanting ions in selected portions of said active region to form non-alloyed source and drain contact layers, said ions implanted in said selected portions of said active region being selected from at least one element of the Groups III and V of the periodic table and selected in accordance with the composition of said substrate; and (d) forming source and drain electrodes by depositing on said source and drain contact layers, respectively, an electrode material selected from the group comprising gold, tungsten, gold-titanium alloys and gold-germanium-nickel alloys, the barrier height across the interfaces of said source and drain electrodes and said non-alloyed contact layer being lower than the barrier height across an interface of said source and drain electrodes and said active region.

Claim 14

A method of fabricating a semiconductor device on a Group III-V semiconductor substrate having a predetermined composition, comnrising the steps of: (a) forming an active region in the substrate; (b) forming a gate electrode on a selected portion of the active region; (c) implanting ions to form source and drain regions in said active region and implanting ions to form non-alloyed contact layers in said source and drain regions using said gate electrode as a mask, said ions implanted to form said non-alloyed contact layers being selected from at least one element of Groups III and V of the periodic table in accordance with the composition of the substrate; (d) annealing the semiconductor device at a temperature of at least 700° C.; and (e) forming source and drain electrodes by depositing on selected portions of the non-alloyed contact layers an electrode material selected from the group comprising gold, tungsten, gold-titanium alloys and gold-germanium-nickel alloys, the barrier height across an interface of the source and drain electrodes and the corresponding non-alloyed contact layers being lower than the barrier height across an interface of the source and drain electrodes and the active region.

Claim 15

A method of fabricating a semiconductor device on a Group III-V semiconductor substrate having a predetermined composition, comnrising the steps of: (a) forming an active region in the substrate; (b) forming a gate electrode on a selected portion of the active region; (c) implanting ions to form source and drain regions in said active region and implanting ions to form non-alloyed contact layers in said source and drain regions using said gate electrode as a mask, said ions implanted to form said non-alloyed contact layers being selected from at least one element of Groups III and V of the periodic table in accordance with the composition of the substrate; (d) annealing the semiconductor device at a temperature of at least 700° C.; and (e) forming source and drain electrodes by depositing on selected portions of the non-alloyed contact layers an electrode material selected from the group comprising gold, tungsten, gold-titanium alloys and gold-germanium-nickel alloys, the barrier height across an interface of the source and drain electrodes and the corresponding non-alloyed contact layers being lower than the barrier height across an interface of the source and drain electrodes and the active region.

Claim 16

A method of forming a semiconductor device on a Group III-V compound semiconductor substrate, comprising the steps of: (a) forming an active region in the substrate and forming a non-alloyed contact layer in the active region; (b) etching a selected portion of the non-alloyed contact layer to expose the active region; and (c) depositing an electrode material selected from the group comprising gold, tungsten, gold-titanium alloys and gold-germanium-nickel alloys to form a gate electrode on the exposed portion of the active region and to form source and drain electrodes on selected portions of the non-alloyed contact layer, the barrier height across the interfaces of the source and drain electrodes and the non-alloyed contact layer being lower than the barrier height across an interface of the source and drain electrodes and the active region.

Claim 17

A method of forming a semiconductor device on a Group III-V compound semiconductor substrate, comprising the steps of: (a) forming an active region in the substrate and forming a non-alloyed contact layer in the active region; (b) etching a selected portion of the non-alloyed contact layer to expose the active region; and (c) depositing an electrode material selected from the group comprising gold, tungsten, gold-titanium alloys and gold-germanium-nickel alloys to form a gate electrode on the exposed portion of the active region and to form source and drain electrodes on selected portions of the non-alloyed contact layer, the barrier height across the interfaces of the source and drain electrodes and the non-alloyed contact layer being lower than the barrier height across an interface of the source and drain electrodes and the active region.